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SN74ABT18652PM Arkusz danych(PDF) 8 Page - Texas Instruments |
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SN74ABT18652PM Arkusz danych(HTML) 8 Page - Texas Instruments |
8 / 11 page SN54ABT18652, SN74ABT18652 SCAN TEST DEVICES WITH 18-BIT BUS TRANSCEIVERS AND REGISTERS SCBS132A – AUGUST 1992 – REVISED OCTOBER 1992 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 timing requirements over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (normal mode) (see Note 4 and Figure 2) SN54ABT18652 SN74ABT18652 UNIT MIN MAX MIN MAX UNIT fclock Clock frequency CLKAB or CLKBA 0 100 0 100 MHz tw Pulse duration CLKAB or CLKBA high or low 3 ns tsu Setup time A before CLKAB ↑ or B before CLKBA↑ 5 ns th Hold time A after CLKAB ↑ or B after CLKBA↑ 0 ns timing requirements over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (test mode) (see Note 4 and Figure 2)123 SN54ABT18652 SN74ABT18652 UNIT MIN MAX MIN MAX UNIT fclock Clock frequency TCK 0 50 0 50 MHz tw Pulse duration TCK high or low 5 ns A, B, CLK, OEAB, OEBA, or S before TCK ↑ 5 tsu Setup time TDI before TCK ↑ 6 ns TMS before TCK ↑ 6 A, B, CLK, OEAB, OEBA, or S after TCK ↑ 0 th Hold time TDI after TCK ↑ 0 ns TMS after TCK ↑ 0 td Delay time Power up to TCK ↑ 50 ns tr Rise time VCC power up 1 µs NOTE 4: Preliminary specifications based on SPICE analysis |
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