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ADCDS-1405 Arkusz danych(PDF) 4 Page - Murata Power Solutions Inc.

Numer części ADCDS-1405
Szczegółowy opis  14-Bit, 5 Megapixels/Second, CCD Signal Processor
Download  9 Pages
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Producent  MURATA-PS [Murata Power Solutions Inc.]
Strona internetowa  http://www.murata-ps.com
Logo MURATA-PS - Murata Power Solutions Inc.

ADCDS-1405 Arkusz danych(HTML) 4 Page - Murata Power Solutions Inc.

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Inverting Mode
The inverting mode of operation can be used in applications where
the analog input to the ADCDS-1405 has a video input signal whose
amplitude is more positive than its associated reference level. The
ADCDS-1405s correlated double sampler (i.e. input amplifier's VOUT)
requires that the video signal's amplitude be more negative than its
reference level at all times (see timing diagram for details). Using the
ADCDS-1405 in the inverting mode allows the designer to perform an
additional signal inversion to correct for any analog "front end" pre-
processing that may have occurred prior to the ADCDS-1405.
Figure 2e. describes the typical configuration for applications using a
video input signal with a maximum amplitude of 0.350Vp-p. Additional
fine gain adjustments can be made using the Fine Gain Adjust
function (pin 1). The coarse gain of this circuit can be determined from
the following equation:
VOUT = 2.8Vp-p = –VIN*(523/75), with all internal resistors having a
1% tolerance.
Figure 2f. describes the typical configuration used in applications
needing to invert video input signals whose amplitude is greater than
0.350Vp-p. Using a single external series resistor (see Figure 4.), the
initial gain of the ADCDS-1405 can be set, with additional fine gain
adjustments being made using the Fine Gain Adjust function (pin 1).
The coarse gain of this circuit can be determined from the following
equation:
VOUT = 2.8Vp-p = –VIN*(523/75+Rext), with all internal resistors
having a 1% tolerance.
Figure 4. Coarse Gain Adjustment Plot
Non-Inverting Mode
The non-inverting mode of the ADCDS-1405 allows the designer to
either attenuate or add non-inverting gain to the video input signal.
This configuration also allows bypassing the ADCDS-1405's internal
coupling capacitor, allowing the user to provide an external capacitor of
appropriate value.
Figure 2c. describes the typical configuration for applications using
video input signals with amplitudes greater than
0.350Vp-p and less than 2.8Vp-p (with common mode limit of ±2.5V
DC). Using a single external series resistor (see Figure 4.), the
coarse gain of the ADCDS-1405 can be set with additional fine gain
adjustments being made using the Fine Gain Adjust function (pin 1 see
Figure 5). The coarse gain of the circuit can be determined from the
following equation:
VOUT = 2.8Vp-p = VIN*(1+(523/(75+Rext))), with all internal resistors
having a 1% tolerance.
Figure 2d. describes the typical configuration for applications using a
video input signal whose amplitude is greater than 2.8Vp-p. Using a
single external series resistor (Rext 1) in conjunction with the internal
5K (1%) resistor to ground, an attenuation of the input signal can be
achieved. Additional fine gain adjustments being made using the Fine
Gain Adjust function (pin 1). The coarse gain of this circuit can be
determined from the following equation:
VOUT = 2.8Vp-p = [VIN*(5000/(Rext1+5000))]*
[1+(523/(75+Rext2))], with all internal resistors having
a 1% tolerance.
Figure 2d.
Figure 2e.
4
3
5
75
523
NO CONNECT
VOUT = 2.8Vp-p
5k
0.01µF
Rext1
VIN
Rext2
4
3
5
75
523
NO CONNECT
VOUT = 2.8Vp-p
5k
0.01µf
–VIN
4
3
5
75
523
NO CONNECT
VOUT = 2.8Vp-p
5k
0.01µf
–VIN
Rext
Figure 2f.
Figure 3. Offset Adjustment Circuit
Coarse Gain Adjustment Plot
External Gain Resistor vs. Full Scale Video Input
10
100
1000
10000
0.25 0.5 0.75 1 1.25 1.5 1.75 2 2.25 2.5 2.75 3
Full Scale Video Signal (Volts)
Inverting Mode
Direct Mode
& Non-Inverting
Mode
Offset
Adjust
2
External
Series
Resistor
ADCDS-1405
+5V
–5V
20KΩ
ADCDS-1405
14-Bit, 5 Megapixels/Second, CCD Signal Processor
Technical enquiries email: sales@murata-ps.com, tel: +1 508 339 3000
www.murata-ps.com
MDC_ADCDS-1405.B02 Page 4 of 9


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