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+25°C

0 TO +70°C

–55 TO +125°C

DYNAMIC PERFORMANCE (Cont.)

MIN.

TYP.

MAX.

MIN.

TYP.

MAX.

MIN.

TYP.

MAX.

UNITS

ANALOG OUTPUT

Internal Reference

Voltage

—

+3.2

—

—

+3.2

—

—

+3.2

—

Volts

Drift

—

±30

—

—

±30

—

—

±30

—

ppm/°C

External Current

—

5

—

—

5

—

—

5

—

mA

DIGITAL OUTPUTS

Logic Levels

Logic "1"

+2.4

—

—

+2.4

—

—

+2.4

—

—

Volts

Logic "0"

—

—

+0.4

—

—

+0.4

—

—

+0.4

Volts

Logic Loading "1"

—

—

–4

—

—

–4

—

—

–4

mA

Logic Loading "0"

—

—

+4

—

—

+4

—

—

+4

mA

Output Coding

(Offset) Binary / Complementary (Offset) Binary / Two's Complement / Complementary Two's Complement

POWER REQUIREMENTS

Power Supply Ranges

+5V Supply

+4.75

+5.0

+5.25

+4.75

+5.0

+5.25

+4.9

+5.0

+5.25

Volts

–5V Supply

–4.75

–5.0

–5.25

–4.75

–5.0

–5.25

–4.9

–5.0

–5.25

Volts

+12V Supply

+11.5

+12.0

+12.5

+11.5

+12.0

+12.5

+11.5

+12.0

+12.5

Volts

–12V Supply

–11.5

–12.0

–12.5

–11.5

–12.0

–12.5

–11.5

–12.0

–12.5

Volts

+15V Supply

+14.5

+15.0

+15.5

+14.5

+15.0

+15.5

+14.5

+15.0

+15.5

Volts

–15V Supply

–14.5

–15.0

–15.5

–14.5

–15.0

–15.5

–14.5

–15.0

–15.5

Volts

Power Supply Currents

+5V Supply

—

+200

—

—

+220

—

—

+220

—

mA

–5V Supply

—

–100

—

—

–150

—

—

–150

—

mA

–12/15V Supply

—

–65

—

—

–65

—

—

—

—

mA

+12/15V Supply

—

+85

—

—

+85

—

—

—

—

mA

Power Dissipation

—

2.85

3.1

—

2.85

3.5

—

2.85

3.5

Watts

Power Supply Rejection

—

—

±0.07

—

—

±0.07

—

—

±0.07

%FSR/%V

Footnotes:

Effective bits is equal to:

All power supplies must be on before applying a start convert pulse. All

supplies and the clock (START CONVERT) must be present during warm-up

periods. The device must be continuously converting during this time.

When COMP. BITS (pin 35) is low, logic loading "0" will be –350μA.

A 5MHz clock with a 50nsec positive pulse width is used for all production

testing. See Timing Diagram for more details.

6.02

(SNR + Distortion) – 1.76 +

20 log

Full Scale Amplitude

Actual Input Amplitude

This is the time required before the A/D output data is valid once the analog

input is back within the specified range.

See table 2a, Setting Output Coding Selection.

–55°C operation only. The minimum limits are +4.75V and –4.75V when

operating at +125°C.

±12V only or ±15V only required.

TECHNICAL NOTES

1. Obtaining fully specified performance from the ADS-935

requires careful attention to pc-card layout and power supply

decoupling. The device's analog and digital ground systems

are connected to each other internally. For optimal perfor-

mance, tie all ground pins (4, 7, 30 and 36) directly to a large

analog ground plane beneath the package.

For the best performance it is recommended to use a single

power source for both the +5V analog and +5V digital supplies.

Bypass all power supplies and the +3.2V reference output to

ground with 4.7μF tantalum capacitors in parallel with 0.1μF

ceramic capacitors. Locate the bypass capacitors as close to

the unit as possible.

2. The ADS-935 achieves its specified accuracies without the

need for external calibration. If required, the device's small

initial offset and gain errors can be reduced to zero using

the adjustment circuitry shown in Figure 2. When using this

circuitry, or any similar offset and gain calibration hardware,

make adjustments following warm-up. To avoid interaction,

always adjust offset before gain. Tie pins 5 and 6 to ANALOG

GROUND (pin 4) if not using offset and gain adjust circuits.

3. Pin 35 (COMP. BITS) is used to select the digital output

coding format of the ADS-935. See Tables 2a and 2b.

When this pin has a TTL logic "0" applied, it complements all

of the ADS-935’s digital outputs.

When pin 35 has a logic "1" applied, the output coding is

complementary (offset) binary. Applying a logic "0" to pin 35

changes the coding to (offset) binary. Using the MSB output

(pin 29) instead of the MSB output (pin 28) changes the

respective output codings to complementary two's

complement and two's complement.

Pin 35 is TTL compatible and can be directly driven with

digital logic in applications requiring dynamic control over

its function. There is an internal pull-up resistor on pin 35

allowing it to be either connected to +5V or left open when a

logic "1" is required.

4. To enable the three-state outputs, connect OUTPUT

ENABLE (pin 34) to a logic "0" (low). To disable, connect pin

34 to a logic "1" (high).