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SN74ALVTH162827VR Arkusz danych(PDF) 2 Page - Texas Instruments |
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SN74ALVTH162827VR Arkusz danych(HTML) 2 Page - Texas Instruments |
2 / 14 page SN54ALVTH162827, SN74ALVTH162827 2.5-V/3.3-V 20-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCES079E – JULY 1996 – REVISED DECEMBER 1998 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 description (continued) The devices are composed of two 10-bit sections with separate output-enable signals. For either 10-bit buffer section, the two output-enable (1OE1 and 1OE2, or 2OE1 and 2OE2) inputs must be low for the corresponding Y outputs to be active. If either output-enable input is high, the outputs of that 10-bit buffer section are in the high-impedance state. When VCC is between 0 and 1.2 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.2 V, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. All outputs are designed to sink up to 12 mA, and include equivalent 30- Ω resistors to reduce overshoot and undershoot. Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. The SN54ALVTH162827 is characterized for operation over the full military temperature range of –55 °C to 125 °C. The SN74ALVTH162827 is characterized for operation from –40°C to 85°C. FUNCTION TABLE (each 10-bit section) INPUTS OUTPUT OE1 OE2 A Y L L L L L LH H H XX Z X H X Z logic diagram (positive logic) 1Y1 2 1 55 1OE1 1OE2 56 2Y1 15 28 42 29 2OE1 2OE2 To Nine Other Channels To Nine Other Channels 1A1 2A1 |
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