SN54CBT3383, SN74CBT3383

10-BIT FET BUS-EXCHANGE SWITCHES

SCDS003J – NOVEMBER 1992 – REVISED MAY 1999

3

POST OFFICE BOX 655303

recommended operating conditions (see Note 3)

SN54CBT3383

SN74CBT3383

UNIT

MIN

MAX

MIN

MAX

UNIT

VCC

Supply voltage

4.5

5.5

4.5

5.5

V

VIH

High-level control input voltage

2

2

V

VIL

Low-level control input voltage

0.8

0.8

V

TA

Operating free-air temperature

–55

125

0

70

°C

NOTE 3: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,

Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

electrical characteristics over recommended operating free-air temperature range (unless

otherwise noted)

PARAMETER

TEST CONDITIONS

SN54CBT3383

SN74CBT3383

UNIT

PARAMETER

TEST CONDITIONS

MIN

TYP†

MAX

MIN

TYP†

MAX

UNIT

VIK

VCC = 4.5 V,

II = –18 mA

–1.2

–1.2

V

II

VCC = 5.5 V,

VI = 5.5 V or GND

±5

±1

µA

ICC

VCC = 5.5 V,

IO = 0,

VI = VCC or GND

50

50

µA

∆ICC‡ Control inputs

VCC = 5.5 V, One input at 3.4 V,

Other inputs at VCC or GND

2.5

2.5

mA

Ci

Control inputs

VI = 3 V or 0

3

pF

Ci

Control inputs

VI = 2.5 V

5

pF

Ci (OFF)

VO = 3 V or 0,

BE = VCC

6

pF

Cio(OFF)

VO = 2.5 V,

BE = VCC

6

pF

§

VI =0

II = 64 mA

5

9.2

5

7

ron§

VCC = 4.5 V

VI = 0

II = 30 mA

5

7

Ω

VI = 2.4 V,

II = 15 mA

10

17

10

15

† All typical values are at VCC = 5 V, TA = 25°C.

‡ This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND.

§ Measured by the voltage drop between the input terminal and the output terminal at the indicated current through the switch. On-state resistance

is determined by the lowest voltage of the two (A or B) terminals.

(unless otherwise noted) (see Figure 1)

PARAMETER

FROM

TO

SN54CBT3383

SN74CBT3383

UNIT

PARAMETER

(INPUT)

(OUTPUT)

MIN

MAX

MIN

MAX

UNIT

tpd¶

A or B

B or A

1.5

0.25

ns

tpd

BX

A or B

1

10.2

1

9.2

ns

ten

BE

A or B

1

10.8

1

8.6

ns

tdis

BE

A or B

1

8.2

1

7.5

ns

¶ The propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified load capacitance, when

driven by an ideal voltage source (zero output impedance).