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ADP3110A Arkusz danych(PDF) 4 Page - ON Semiconductor |
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ADP3110A Arkusz danych(HTML) 4 Page - ON Semiconductor |
4 / 8 page ADP3110A http://onsemi.com 4 ELECTRICAL CHARACTERISTICS (Note 4) (VCC = 12 V, TA = 0°C to +85°C, TJ = 0°C to +125°C unless otherwise noted.) Characteristic Symbol Condition Min Typ Max Unit Supply Supply Voltage Range VCC − 4.6 − 13.2 V Supply Current ISYS BST = 12 V, IN = 0 V − 0.7 5.0 mA OD Input Input Voltage High VOD_HI − 2.0 − − V Input Voltage Low VOD_LO − − − 0.8 V Hysteresis − − 400 − mV Input Current No internal pullup or pulldown resistors −1.0 − +1.0 mA PWM Input Input Voltage High VPWM_HI − 2.0 − − V Input Voltage Low VPWM_LO − − − 0.8 V Hysteresis − − − 400 − mV Input Current − No internal pullup or pulldown resistors −1.0 − +1.0 mA High−Side Driver Output Resistance, Sourcing Current − BST − SW = 12 V − 2.2 3.4 W Output Resistance, Sinking Current − BST − SW = 12 V − 1.0 1.8 W Output Resistance, Unbiased − BST − SW = 0 V − 15 − kW Transition Times trDRVH tfDRVH BST − SW = 12 V, CLOAD = 3.0 nF (See Figure 3) − 20 11 55 45 ns Propagation Delay Times (Note 5) tpdhDRVH tpdlDRVH tpdlOD tpdhOD BST − SW = 12 V, CLOAD = 3.0 nF BST − SW = 12 V, CLOAD = 3.0 nF (See Figure 3) (See Figure 2) (See Figure 2) 32 45 25 20 25 70 35 35 55 ns SW Pulldown Resitance − SW to PGND − 15 − kW Low−Side Driver Output Resistance, Sourcing Current − − 1.8 3.4 W Output Resistance, Sinking Current − − 1.0 1.8 W Output Resistance, Unbiased − VCC = PGND − 15 − kW Transition Times trDRVL tfDRVL CLOAD = 3.0 nF, (See Figure 3) − 16 11 50 30 ns Propagation Delay Times (Note 5) tpdhDRVL tpdlDRVL tpdlOD tpdhOD CLOAD = 3.0 nF, (See Figure 3) (Note 6, tpdhDRVL only) (See Figure 2) (See Figure 2) − 12 15 20 20 35 40 35 35 ns Timeout Delay − DRVH − SW = 0 − 85 − ns Undervoltage Lockout UVLO Startup − − 3.9 4.3 4.5 V UVLO Shutdown − − 3.7 4.1 4.3 V Hysteresis − − 0.1 0.2 0.4 V 4. All limits at temperature extremes are guaranteed via correlation using standard Statistical Quality Control (SQC). 5. For propagation delays, “tpdh” refers to the specified signal going high; “tpdl” refers to it going low. 6. Guaranteed by design; not tested in production. |
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