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SN74LVTH543DB Arkusz danych(PDF) 2 Page - Texas Instruments |
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SN74LVTH543DB Arkusz danych(HTML) 2 Page - Texas Instruments |
2 / 8 page SN54LVTH543, SN74LVTH543 3.3-V ABT OCTAL REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS SCBS704D – AUGUST 1997 – REVISED APRIL 1999 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 description (continued) When VCC is between 0 and 1.5 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.5 V, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. This device is fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict. The SN54LVTH543 is characterized for operation over the full military temperature range of –55 °C to 125°C. The SN74LVTH543 is characterized for operation from –40 °C to 85°C. FUNCTION TABLE† INPUTS OUTPUT CEAB LEAB OEAB A B H X X X Z X XH X Z L HL X B0‡ L LL L L L L L H H † A-to-B data flow is shown; B-to-A flow control is the same except that it uses CEBA, LEBA, and OEBA. ‡ Output level before the indicated steady-state input conditions were established logic symbol§ 4 2C6 14 3 A1 4 A2 B1 22 5D 5 A3 6 A4 7 A5 8 A6 9 A7 10 A8 B2 21 B3 20 B5 18 B4 19 B6 17 B8 15 B7 16 LEAB 3 G2 11 CEAB 2EN4 13 OEAB 1C5 1 LEBA G1 23 CEBA 1EN3 2 OEBA 6D § This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for the DB, DGV, DW, JT, PW, and W packages. 1 1 |
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