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SN74ALS236N Arkusz danych(PDF) 9 Page - Texas Instruments |
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SN74ALS236N Arkusz danych(HTML) 9 Page - Texas Instruments |
9 / 11 page SN74ALS236 64 × 4 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY SDAS107C – OCTOBER 1986 – REVISED APRIL 1998 9 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PARAMETER MEASUREMENT INFORMATION tPHZ tPLZ tPHL tPLH 0.3 V tPZL tPZH tPLH tPHL LOAD CIRCUIT FOR 3-STATE OUTPUTS From Output Under Test Test Point R1 = 500 Ω S1 CL = 50 pF 7 V (see Note A) Open 1.3 V 1.3 V 1.3 V 3.5 V 3.5 V 0.3 V 0.3 V th tsu VOLTAGE WAVEFORMS SETUP AND HOLD TIMES Timing Input Data Input 1.3 V 1.3 V 3.5 V 3.5 V 0.3 V 0.3 V High-Level Pulse Low-Level Pulse VOLTAGE WAVEFORMS PULSE DURATION Input (see Note C) Out-of-Phase Output 1.3 V 1.3 V 1.3 V 1.3 V 1.3 V 1.3 V 1.3 V 1.3 V 1.3 V 1.3 V 3.5 V 3.5 V 0.3 V 0.3 V VOL VOH VOH VOL Output Control Waveform 1 S1 Closed (see Note B) Waveform 2 S1 Open (see Note B) 0 V VOH VOL 3.5 V In-Phase Output 0.3 V 1.3 V 1.3 V VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS R2 = 500 Ω tw tPZH tPZL tPHZ tPLZ Open Closed Open Closed PARAMETER S1 ten tdis tpd NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, Zo = 50 Ω, tr ≤ 2 ns, tf ≤ 2 ns. D. The outputs are measured one at a time with one transition per measurement. Open Open tPLH tPHL Figure 5. Load Circuit and Voltage Waveforms |
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