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SN74F174A Arkusz danych(PDF) 1 Page - Texas Instruments |
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SN74F174A Arkusz danych(HTML) 1 Page - Texas Instruments |
1 / 5 page SN74F174A HEX D-TYPE FLIP-FLOP WITH CLEAR SDFS029B – D2932, MARCH 1987 – REVISED OCTOBER 1993 Copyright © 1993, Texas Instruments Incorporated 2–1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 • Contains Six Flip-Flops With Single-Rail Outputs • Buffered Clock and Direct Clear Inputs • Applications Include: Buffer/Storage Registers Shift Registers Pattern Generators • Fully Buffered Outputs for Maximum Isolation From External Disturbances • Package Options Include Plastic Small-Outline Packages and Standard Plastic 300-mil DIPs description This monolithic, positive-edge-triggered flip-flop utilizes TTL circuitry to implement D-type flip-flop logic with a direct clear (CLR) input. Information at the data (D) inputs meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock (CLK) input is at either the high or low level, the D-input signal has no effect at the output. The SN74F174A is characterized for operation from 0 °C to 70°C. FUNCTION TABLE (each flip-flop) INPUTS OUTPUT CLR CLK D Q H L X Q0 H ↑ HH H ↑ LL L X X L logic symbol† 1D 3 1D 4 2D 6 3D 11 4D 13 5D 1Q 2 2Q 5 3Q 7 4Q 10 5Q 12 R 1 9 CLK CLR C1 14 6D 6Q 15 † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 CLR 1Q 1D 2D 2Q 3D 3Q GND VCC 6Q 6D 5D 5Q 4D 4Q CLK D OR N PACKAGE (TOP VIEW) PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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