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TPIC2603NE Arkusz danych(PDF) 6 Page - Texas Instruments |
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TPIC2603NE Arkusz danych(HTML) 6 Page - Texas Instruments |
6 / 17 page TPIC2603 6-CHANNEL SERIAL INTERFACE LOW-SIDE DRIVER SLIS056A – FEBRUARY 1995 – REVISED MARCH 1996 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PRINCIPLES OF OPERATION SCLK tsu1 12 3 X twL(SCLK) twH(SCLK) tw tsu(SDI) th(SDI) tpd1 tpd3 tpd2 MSB LSB 3-STATE MSB LSB 3-STATE CS SDI SDO Figure 1. Switching Characteristics serial interface Control information is transferred into the TPIC2603 through the serial interface. The serial interface consists of a serial clock (SCLK), chip select (CS), serial data input (SDI), and serial data output (SDO). Serial data is shifted, most significant bit (MSB) first, into the SDI shift register on the rising edge of the first SCLK after CS has transited from high to low. The controller must shift either eight bits or sixteen bits of data into the device with the last six bits of input data containing control information for the output drivers. Data bits preceeding the output control information should be set to 0. A low-to-high transition on CS latches the contents of the last six bits of the serial shift register into the output buffer. A low input to SDI turns the corresponding parallel output OFF and a high input will turn the output ON (see Figure 2). 1 234 5 6 7 8 DRAIN5 OFF DRAIN4 ON DRAIN3 ON DRAIN2 OFF DRAIN1 OFF DRAIN0 ON 0 SCLK CS SDI NEW DATA Figure 2. Serial Input Control |
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