Zakładka z wyszukiwarką danych komponentów
  Polish  ▼
ALLDATASHEET.PL

X  

TSB12LV22 Arkusz danych(PDF) 6 Page - Texas Instruments

Numer części TSB12LV22
Szczegółowy opis  OHCI-Lynx PCI-BASED IEEE 1394 HOST CONTROLLER
Download  45 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Producent  TI [Texas Instruments]
Strona internetowa  http://www.ti.com
Logo TI - Texas Instruments

TSB12LV22 Arkusz danych(HTML) 6 Page - Texas Instruments

Back Button TSB12LV22 Datasheet HTML 2Page - Texas Instruments TSB12LV22 Datasheet HTML 3Page - Texas Instruments TSB12LV22 Datasheet HTML 4Page - Texas Instruments TSB12LV22 Datasheet HTML 5Page - Texas Instruments TSB12LV22 Datasheet HTML 6Page - Texas Instruments TSB12LV22 Datasheet HTML 7Page - Texas Instruments TSB12LV22 Datasheet HTML 8Page - Texas Instruments TSB12LV22 Datasheet HTML 9Page - Texas Instruments TSB12LV22 Datasheet HTML 10Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 6 / 45 page
background image
TSB12LV22
OHCI-Lynx PCI-BASED IEEE 1394 HOST CONTROLLER
SLLS290 – JULY 1998
6
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Terminal Functions (Continued)
TERMINAL
I/O
DESCRIPTION
NAME
NO.
I/O
DESCRIPTION
PCI Interface Control (Continued)
PCI_PERR
49
I/O
PCI Parity Error Indicator. This signal is driven by a PCI device to indicate that calculated parity does not match
PAR when enabled through the command register.
PCI_PME
17
PCI_REQ
15
O
PCI Bus Request. Asserted by the OHCI-Lynx to request access to the bus as an initiator. The host arbiter
will assert the GNT# signal when the OHCI-Lynx has been granted access to the bus.
PCI_SERR
51
O
PCI System Error. Output pulsed from the OHCI-Lynx when enabled indicating an address parity error has
occurred. The OHCI-Lynx needs not be the target of the PCI cycle to assert this signal.
PCI_TRDY
45
I/O
PCI Target Ready. TRDY indicates the PCI bus target’s ability to complete the current data phase of the
transaction. A data phase is completed upon a rising edge of PCLK where both IRDY and TRDY are asserted;
until which wait states are inserted.
IEEE1394 PHY/Link
PHY_CTL1
PHY_CTL0
92
93
I/O
Phy-link Interface Control. These bidirectional signals control passage of information between the two
devices. The OHCI-Lynx can only drive these terminals after the PHY has granted permission following a link
request (LREQ).
PHY_DATA7 –
PHY_DATA0
81,82,
84–86,
88–90
I/O
Phy-link Interface Data. These bidirectional signals pass data between the OHCI-Lynx and the PHY device.
These terminals are driven by the OHCI-Lynx on transmissions, and driven by the PHY on reception. Only
DATA1:0 are valid for 100Mbit speeds, DATA4:0 are valid for 200Mbit speeds, and DATA7:0 are valid for 400
Mbit speeds.
PHY_SCLK
95
I
System Clock. This input from the PHY provides a 49.152 MHz clock signal for data synchronization.
PHY_LREQ
97
O
Link Request. This signal is driven by the OHCI-Lynx to initiate a request for the PHY to perform some service.
Miscellaneous
SDA
5
I/O
Serial Data. The OHCI-Lynx determines whether a two-wire serial ROM, or no serial ROM is implemented
at reset. If a two-wire serial ROM is detected, then this terminal provides the SDA serial data signaling. This
terminal must be wired low to indicate no serial ROM is present.
SCL
4
I/O
Serial Clock. The OHCI-Lynx determines whether a two-wire, or no serial ROM is implemented at reset. If a
two-wire serial ROM is implemented, then this terminal provides the SCL serial clock signaling.
ISOLATED
79
I
Phy–link Isolation Barrier Mode. This terminal should be asserted when the PHY device is electrically isolated
from the OHCI-Lynx. This input controls bus-hold I/Os.
CYCLEIN
78
I
Cycle Input. This optional external 8KHz clock input may be used as the cycle timer clock, and can be used
for synchronization with other system devices.
CYCLEOUT
77
O
Cycle Output. This optional 8 kHz output may be used for cycle timer synchronization.
GPIO3
3
I/O
General Purpose I/O [3]
GPIO2
2
I/O
General Purpose I/O [2]
LPS/GPIO1
99
I/O
General Purpose I/O [1]/ Link Power Status Output. Link Power status indicates that link is powered and full
functional.
BMC/LINKON/
GPIO0
98
I/O
General Purpose I/O [0]/Bus Manager Contender Output/LINKON#.
LINKON. Receipt of a link-on packet. Once asserted LINKON shall remain asserted until LPS is asserted or
the PHY register L bit is set to one
TEST_EN
76
I
OHCI-Lynx controller programming model
This section describes the internal registers used to program the OHCI-Lynx, including both PCI configuration
registers and Open HCI registers. All registers are detailed in the same format. A brief description is provided
for each register, followed by the register offset and a bit–table describing the reset state for each register.


Podobny numer części - TSB12LV22

ProducentNumer częściArkusz danychSzczegółowy opis
logo
Texas Instruments
TSB12LV22 TI1-TSB12LV22 Datasheet
586Kb / 45P
[Old version datasheet]   OHCI-Lynx PCI-BASED IEEE 1394 HOST CONTROLLER
TSB12LV22PZ TI1-TSB12LV22PZ Datasheet
586Kb / 45P
[Old version datasheet]   OHCI-Lynx PCI-BASED IEEE 1394 HOST CONTROLLER
TSB12LV22 TI1-TSB12LV22_12 Datasheet
586Kb / 45P
[Old version datasheet]   OHCI-Lynx PCI-BASED IEEE 1394 HOST CONTROLLER
More results

Podobny opis - TSB12LV22

ProducentNumer częściArkusz danychSzczegółowy opis
logo
Texas Instruments
TSB12LV26 TI1-TSB12LV26_14 Datasheet
82Kb / 6P
[Old version datasheet]   OHCI-Lynx??PCI-Based IEEE 1394 Host Controller
TSB12LV26PZT TI-TSB12LV26PZT Datasheet
62Kb / 5P
[Old version datasheet]   OHCI-Lynx PCI-Based IEEE 1394 Host Controller
TSB12LV26-EP TI1-TSB12LV26-EP Datasheet
472Kb / 85P
[Old version datasheet]   OHCI-LYNX PCI-BASED IEEE 1394 HOST CONTROLLER
TSB12LV26 TI-TSB12LV26 Datasheet
391Kb / 91P
[Old version datasheet]   OHCI-Lynx PCI-BASED IEEE 1394 HOST CONTROLLER
TSB12LV26-EP TI1-TSB12LV26-EP_14 Datasheet
476Kb / 85P
[Old version datasheet]   OHCI-Lynx PCI-Based IEEE 1394 Host controller
TSB12LV22 TI1-TSB12LV22_12 Datasheet
586Kb / 45P
[Old version datasheet]   OHCI-Lynx PCI-BASED IEEE 1394 HOST CONTROLLER
TSB12LV23 TI-TSB12LV23 Datasheet
342Kb / 85P
[Old version datasheet]   TSB12LV23 OHCI-Lynx PCI-Based IEEE 1394 Host Controller
logo
National Semiconductor ...
CS4210 NSC-CS4210 Datasheet
1Mb / 102P
   IEEE 1394 OHCI Controller
logo
Texas Instruments
TSB82AF15-EP TI-TSB82AF15-EP Datasheet
3Mb / 177P
[Old version datasheet]   TSB82AF15-EP PCI Express-Based IEEE 1394b OHCI Host Controller
logo
List of Unclassifed Man...
VT6305 ETC-VT6305 Datasheet
220Kb / 35P
   PCI 1394 Host Controller
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45


Arkusz danych Pobierz

Go To PDF Page


Link URL




Polityka prywatności
ALLDATASHEET.PL
Czy Alldatasheet okazała się pomocna?  [ DONATE ] 

O Alldatasheet   |   Reklama   |   Kontakt   |   Polityka prywatności   |   Linki   |   Lista producentów
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com