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TSB14C01AI Arkusz danych(PDF) 6 Page - Texas Instruments |
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TSB14C01AI Arkusz danych(HTML) 6 Page - Texas Instruments |
6 / 31 page TSB14C01A, TSB14C01AI, TSB14C01AM 5-V IEEE 1394-1995 BACKPLANE TRANSCEIVER/ARBITER SGLS107A – FEBRUARY 1999 – REVISED NOVEMBER 1999 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 Terminal Functions (continued) TERMINAL NAME PM NO. HV NO. TYPE I/O DESCRIPTION RPREFIX 63 7 TTL O Receiver prefix. When asserted high (enabled), RPREFIX alerts the receiver of an incoming packet. RPREFIX is for test and debug and is not used in normal operation. RSTRB 42 54 TTL I Receive strobe. RSTRB decodes the received data. SCLK 10 20 TTL O System clock output. A 49.152-MHz or 24.576-MHz clock signal synchronized with the data transfers, and provided to the link. TDATA 40 52 CMOS O Transmit data. Data to be transmitted is serialized on TDATA. TI1 58 2 TTL I Test input 1. TI1 is used for test purposes only and should be tied to ground for normal operation. TSCLK 11 21 TTL O System clock output. A 49.152-MHz or 24.576-MHz clock signal that is 180 degrees out of phase with SCLK; it is available if needed. TSTRB 39 51 CMOS O Transmit strobe. TSTRB encodes transmit data. XI_50 55 67 CMOS I External oscillator input. An external 49.152-MHz oscillator can drive the TSB14C01A. XI_100 52 64 CMOS I External oscillator input. An external 98.304-MHz oscillator can drive the TSB14C01A. Table 1. External Priority Coding EXTERNAL PRIORITY TERMINALS DESCRIPTION ENA_PRI EN_EXPRI EX_PRI0 – EX_PRI3 DESCRIPTION X H L L L L L L L H . . . H H H H The priority for this node is determined by the values on EX_PRI0 – EX_PRI3. The state of ENA_PRI can be either tied to VCC or GND. L L X This sets a 7-bit bus request and is the cable environment format. Priority must be set by executing a write request (see Table 10). H L X This sets an 11-bit bus request and is the backplane environment format. Priority is dynamically set as part of the bus request (see Table 8) |
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