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ISL6115ACBZ Arkusz danych(PDF) 8 Page - Intersil Corporation |
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ISL6115ACBZ Arkusz danych(HTML) 8 Page - Intersil Corporation |
8 / 10 page 8 FN6855.0 February 25, 2009 ISL6115AEVAL1Z Board The ISL6115AEVAL1Z is default provided as a +12V high side switch controller with the CR level set at ~2.5A. See Figure 11 for ISL6115AEVAL1Z schematic and Table 3 for BOM. Bias and load connection points are provided along with test points for each IC pin. With J1 installed the ISL6115A will be biased from the +12V supply (VIN) being switched. Connect the load to VLOAD+. PWRON pin pulls high internally enabling the ISL6115A if not driven low via PWRON test point or J2. With R3 = 1.24kΩ the CR Vth is set to 24.8mV and with the 10m Ω sense resistor (R1) the ISL6115AEVAL1Z has a nominal CR level of 2.5~A. The 0.01µF delay time to latch-off capacitor results in a nominal 1ms before latch-off of output after an OC event. Reconfiguring the ISL6115AEVAL1Z board for a higher CR level can be done by changing the RSENSE and/or RISET resistor values as the provided FET is rated for a much higher current. FIGURE 12. IOC REGULATION and TURN-OFF FIGURE 13. WOC TURN-OFF and RESTART Typical Performance Curves (Continued) VOUT GATE ILOAD CTIM VOUT GATE ILOAD CTIM FIGURE 14. ISL6115AEVAL1Z HIGH SIDE SWITCH APPLICATION and PHOTOGRAPH 5 6 8 7 4 3 2 1 ISL6115A U1 R3 R2 C1 C3 R4 J1 VBIAS VIN +12V C2 R1 PWRON VBIAS AGND VLOAD+ U2 VOUT CTIM J2 PGOOD ISL6115A |
Podobny numer części - ISL6115ACBZ |
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Podobny opis - ISL6115ACBZ |
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