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ADuM4401BRWZ Arkusz danych(PDF) 3 Page - Analog Devices |
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ADuM4401BRWZ Arkusz danych(HTML) 3 Page - Analog Devices |
3 / 20 page ADuM4400/ADuM4401/ADuM4402 Rev. 0 | Page 3 of 20 SPECIFICATIONS ELECTRICAL CHARACTERISTICS—5 V OPERATION All typical specifications are at TA = 25°C, VDD1 = VDD2 = 5 V. Minimum/maximum specifications apply over the entire recommended operation range of 4.5 V ≤ VDD1 ≤ 5.5 V, 4.5 V ≤ VDD2 ≤ 5.5 V, and −40°C ≤ TA ≤ 105°C, unless otherwise noted. Switching specifications are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted. Table 1. Parameter Symbol A Grade B Grade C Grade Unit Test Conditions Min Typ Max Min Typ Max Min Typ Max SWITCHING SPECIFICATIONS Data Rate 1 10 90 Mbps Within PWD limit Propagation Delay tPHL, tPLH 50 65 100 20 32 50 18 27 32 ns 50% input to 50% output Pulse Width Distortion PWD 40 3 0.5 2 ns |tPLH − tPHL| Change vs. Temperature 11 5 3 ps/°C Pulse Width PW 1000 100 8.3 11.1 ns Within PWD limit Propagation Delay Skew tPSK 50 15 10 ns Between any two units Channel Matching Codirectional tPSKCD 50 3 2 ns Opposing-Direction tPSKOD 50 6 5 ns 7 Codirectional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the isolation barrier. Opposing-directional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposing sides of the isolation barrier. Table 2. Parameter Symbol 1 Mbps—A, B, C Grades 10 Mbps—B, C Grades 90 Mbps—C Grade Unit Test Conditions Min Typ Max Min Typ Max Min Typ Max SUPPLY CURRENT ADuM4400 IDD1 2.9 3.5 9.0 11.6 72 100 mA IDD2 1.2 1.9 3.0 5.5 19 36 mA ADuM4401 IDD1 2.5 3.2 7.4 10.6 59 82 mA IDD2 1.6 2.4 4.4 6.5 32 46 mA ADuM4402 IDD1 2.0 2.8 6.0 7.5 51 62 mA IDD2 2.0 2.8 6.0 7.5 51 62 mA Table 3. For All Models Parameter Symbol Min Typ Max Unit Test Conditions DC SPECIFICATIONS Logic High Input Threshold VIH 2.0 V Logic Low Input Threshold VIL 0.8 V Logic High Output Voltage VOH VDDx − 0.1 VDDx − 0.4 5.0 4.8 V V IOx = −20 μA, VIx = VIxH IOx = −4 mA, VIx = VIxH Input Current per Channel II −10 +0.01 +10 μA 0 V ≤ VI x ≤ VDDx Supply Current per Channel Quiescent Input Supply Current IDDI(Q) 0.57 0.83 mA Quiescent Output Supply Current IDDO(Q) 0.23 0.35 mA Dynamic Input Supply Current IDDI(D) 0.20 mA/Mbps Dynamic Output Supply Current IDDO(D) 0.05 mA/Mbps AC SPECIFICATIONS Output Rise/Fall Time tR/tF 2.5 ns 10% to 90% Common-Mode Transient Immunity1 |CM| 25 35 kV/μs VIx = VDDx, VCM = 1000 V, transient magnitude = 800 V Output Disable Propagation Delay tPHZ,tPLH 6 8 ns High/low-to-high impedance Output Enable Propagation Delay tPZH,tPZL 6 8 ns High impedance-to-high/low Refresh Rate fr 1.2 Mbps 1|CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. |
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