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ADN4604ASVZ-RL Arkusz danych(PDF) 4 Page - Analog Devices

Numer części ADN4604ASVZ-RL
Szczegółowy opis  4.25 Gbps, 16 횞 16, Digital Crosspoint Switch
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Producent  AD [Analog Devices]
Strona internetowa  http://www.analog.com
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ADN4604ASVZ-RL Arkusz danych(HTML) 4 Page - Analog Devices

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ADN4604
Rev. 0 | Page 4 of 40
Parameter
Conditions
Min
Typ
Max
Unit
THERMAL CHARACTERISTICS
Operating Temperature Range
−40
+85
°C
θJA
Still air; JEDEC 4-layer test board
24.9
°C/W
θJB
Still air
11.6
°C/W
θJC
At the exposed pad
0.95
°C/W
LOGIC CHARACTERISTICS
Input High Voltage Threshold (VIH)
DVCC = 3.3 V
0.7 × VCC
VCC
V
Input Low Voltage Threshold (VIL)
DVCC = 3.3 V
VEE
0.3 × VCC
V
Output High Voltage (VOH)
2 kΩ pull-up resistor to DVCC
DVCC
V
Output Low Voltage (VOL)
IOL = 3 mA
VEE
0.4
V
1 VICM is the input common-mode voltage.
2 Minimum VTTO is only applicable for a limited range of output current settings. Refer to the Power Dissipation section.
I2C TIMING SPECIFICATIONS
S
P
Sr
S
SDA
SCL
tf
tf
tf
tf
tBUF
tLOW
tHD:STA
tHD:DAT
tHIGH
tSU:DAT
tSU:STA
tSU:STO
tHD:STA
Figure 2. I2C Timing Diagram
Table 2. I2C Timing Specifications
Parameter
Symbol
Min
Max
Unit
SCL Clock Frequency
fSCL
0
400+
kHz
Hold Time for a Start Condition
tHD;STA
0.6
μs
Setup Time for a Repeated Start Condition
tSU;STA
0.6
μs
Low Period of the SCL Clock
tLOW
1.3
μs
High Period of the SCL Clock
tHIGH
0.6
μs
Data Hold Time
tHD;DAT
0
μs
Data Setup Time
tSU;DAT
10
ns
Rise Time for Both SDA and SCL
tr
1
300
ns
Fall Time for Both SDA and SCL
tf
1
300
ns
Setup Time for Stop Condition
tSU;STO
0.6
μs
Bus-Free Time Between a Stop Condition and a Start Condition
tBUF
1
ns
Bus Idle Time After a Reset
10
ns
Reset Pulse Width
10
ns


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