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5V7855SWFR Arkusz danych(PDF) 4 Page - Integrated Device Technology |
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5V7855SWFR Arkusz danych(HTML) 4 Page - Integrated Device Technology |
4 / 14 page IDT5V7855-DPK REVISION A MARCH 11, 2010 4 ©2010 Integrated Device Technology, Inc. IDT5V7855 Data Sheet EEPROM PROGRAMMABLE PLL DIE FOR LVCMOS CRYSTAL OSCILLATOR Output Divider (D) The Output Divider register is a 7-bit register so the possible values which may be programmed are 1 through 127. Combining the information from the three registers, including the final output divider and the crystal frequency, the output frequency may be derived. The actual frequency produced from a given crystal frequency may be determined as: FOUT is the output frequency FXTAL is the Crystal Frequency P is the Prescaler Value D is the Output Divider Value MDEC is the Fractional Divider (decimal) Value Fine Frequency Adjustment The IDT5V7855 also has a fine frequency adjustment capability utilizing adjustable tuning capacitors in the crystal oscillator. These capacitors are set through a tuning capacitor register which is a 9-bit register and the resolution of the tuning capacitance is approximately 0.01pF per bit. The frequency ppm tuning performance can be found by: C1 is the Crystal Motional Capacitance C0 is the Crystal Shunt Capacitance CL is the Inherent (parasitic) Load Capacitance CSTEP is the Tuning Capacitance Resolution 0.01pF TREG is the Tuning Capacitor Register Value from 0 to 511 Determining the Appropriate Register Settings A typical use for this type of device is generating virtually any frequency between 1MHz to 170MHz from a single crystal frequency value. The steps required to accomplish this are: 1. Determine the crystal frequency. 2. Determine the desired output frequency. 3. Determine the proper prescaler value using the crystal frequency and the associated phase detector frequency. 4. Determine the proper output divider using the desired output frequency to optimize the internal VCO frequency. 5. Determine the appropriate fractional multiplier value using the phase detector frequency and the VCO frequency. 6. Determine the MBIN value by multiplying the MDEC value by 16384. Using table 3B, identify the crystal frequency from the given ranges and select the associated prescaler (P) value. The phase detector frequency is then calculated as: Table 3B. Crystal Range Table Identify the range(s) that match the desired output frequency and select the associated Output Divider (D) value. The VCO frequency is then calculated as: Table 3C. FVCO Table NOTE: The specified minimum output frequency is 1MHz. While output frequencies less than 1MHz are possible, specified device performance is not guaranteed. FOUT FXTAL () x MDEC Px Dx 2 () --------------------------- = FREQ ppm () C1 2 --------x 1 C0 CL C STEP xTREG ++ ------------------------------------------------------------------ 1 C0 CL + ---------------------- – x106ppm = Crystal Range (MHz) Prescaler (P) Phase Detector Frequency (MHz) 16 – 50 1 16 – 50 16 – 50 2 8 – 25 16 – 50 3 5.3333 – 16.6667 21.25 – 50 4 5.3125 – 12.5 26.5625 – 50 5 5.3125 – 10 31.875 – 50 6 5.3125 – 8.3333 Output Frequency Range (MHz) FOUT Output Divider (D) VCO Frequency (MHz) 85.0000 – 170.0000 1 170 – 340 42.5000 – 85.0000 2 170 – 340 28.3333 – 56.6667 3 170 – 340 21.2500 – 42.5000 4 170 – 340 17.0000 – 34.0000 5 170 – 340 14.1667 – 28.3333 6 170 – 340 • • • • • • • • • 0.6800 – 1.3600 (NOTE) 125 170 – 340 0.6746 – 1.3492 (NOTE) 126 170 – 340 0.6693 – 1.3386 (NOTE) 127 170 – 340 F PHASE DET – F XTAL P ---------------- = F VCO F OUT xDx 2 () = |
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