3/16

※

1 Period-Jitter 1σ

This parameter represents standard deviation (=1σ) on cycle distribution data at the time when the output clock cycles are

sampled 1000 times consecutively with the TDS7104 Digital Phosphor Oscilloscope of Tektronix Japan, Ltd.

※

2 Period-Jitter MIN-MAX

This parameter represents a maximum distribution width on cycle distribution data at the time when the output clock cycles are

sampled 1000 times consecutively with the TDS7104 Digital Phosphor Oscilloscope of Tektronix Japan, Ltd.

※

3 Output Lock-Time

This parameter represents elapsed time after power supply turns ON to reach a voltage of 3.0 V, after the system is switched from

Power-Down state to normal operation state, or after the output frequency is switched, until it is stabilized at a specified frequency,

respectively.

※

4 Frequency stability

f0 : This parameter means an optimum frequency at T=25℃(27.000000 MHz), which represents a value of a single piece of IC.

Since no consideration is given to the stability of the crystal oscillator, it should be separately studied according to the system in

use.

※

5 Frequency sensitivity/Frequency sensitivity linearity

These parameters represents that the frequency falls within the area shown in Fig. 2 in the control circuit of control voltage shown

in Fig. 1. It shows the value of IC itself. Since no consideration is given to the stability of the crystal oscillator, it should be

separately studied according to the system in use.

※

Common – Recommended crystal oscillators

The electrical characteristics shown above have been all evaluated with the use of the crystal oscillator NX5032GA (Spec. No.

EXS00A-00278) manufactured by NIHON DEMPA KOGYO CO., LTD., under the conditions of Limiting resistance Rd=30Ωand

Crystal oscillator load CL=10pF. Consequently, in order to use the BU2365FV, the said crystal oscillator is recommended.

Fig.1 Control Circuit of Control Voltage

Fig. 2 Frequency Sensitivity Dispersion Range

※

6 Buffer skew

This parameter is only functional when the BUF_OUT1 and the BUF_OUT2 are driven at the same load capacitance.

Δf/f0

Hi-Z

L

H

0ppm

+60ppm

－

60ppm

+15ppm

－

15ppm

Vc

+30ppm

－

30ppm

+45ppm

－

45ppm

R2

Vc

BU2365FV

R1：R2=1：0.875

R1

R1

10Pin：VCTRL

9Pin：VDD_V

Δf/f0