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ADA4320-1ACPZ-R7 Arkusz danych(PDF) 5 Page - Analog Devices |
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ADA4320-1ACPZ-R7 Arkusz danych(HTML) 5 Page - Analog Devices |
5 / 16 page ADA4320-1 Rev. 0 | Page 5 of 16 TIMING REQUIREMENTS Full temperature range, VCC = 5 V, tR = tF = 4 ns, fCLK = 8 MHz, unless otherwise noted. Table 3. Parameter Min Typ Max Unit Clock Pulse Width (tWH) 16 ns Clock Period (tC) 32 ns Setup Time SDATA vs. Clock (tDS) 5 ns Setup Time DATEN vs. Clock (tES) 16 ns Hold Time SDATA vs. Clock (tDH) 5 ns Hold Time DATEN vs. Clock (tEH) 3 ns Input 10% to 90% Rise and Fall Times, SDATA, DATEN, Clock 10 ns VALID DATA-WORD G1 MSB...LSB VALID DATA-WORD G2 SDATA CLK TXEN ANALOG OUTPUT DATEN tDS tES tEH 8 CLOCK CYCLES GAIN TRANSFER (G1) GAIN TRANSFER (G2) tWH tC SIGNAL AMPLITUDE (p-p) Figure 2. Serial Interface Timing SDATA MSB MSB – 1 MSB – 2 CLK VALID DATA BIT tDS tDH Figure 3. SDATA Timing |
Podobny numer części - ADA4320-1ACPZ-R7 |
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Podobny opis - ADA4320-1ACPZ-R7 |
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