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74HC2G00DP Arkusz danych(PDF) 6 Page - NXP Semiconductors |
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74HC2G00DP Arkusz danych(HTML) 6 Page - NXP Semiconductors |
6 / 13 page 74HC_HCT2G00_4 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 04 — 3 July 2008 6 of 13 NXP Semiconductors 74HC2G00; 74HCT2G00 Dual 2-input NAND gate [1] tpd is the same as tPLH and tPHL. [2] tt is the same as tTLH and tTHL. [3] CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; Σ(C L × VCC 2 × f o) = sum of outputs. 12. Waveforms 74HCT2G00 tpd propagation delay nA and nB to nY; see Figure 6 [1] VCC = 4.5 V - 12 24 - 29 ns tt transition time VCC = 4.5 V; see Figure 6 [2] - 6 19 - 22 ns CPD power dissipation capacitance VI = GND to VCC − 1.5 V [3] -10- - - pF Table 8. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V); all typical values are measured at Tamb =25 °C; for test circuit see Figure 7. Symbol Parameter Conditions −40 °C to +85 °C −40 °C to +125 °C Unit Min Typ Max Min Max Measurement points are given in Table 9. VOL and VOH are typical output voltage levels that occur with the output load. Fig 6. Propagation delay data input (nA, nB) to data output (nY) and transition time output (nY) 001aae759 tPLH tPHL VM VM 90% 10% VM VM nY output nA, nB input VI GND VOH VOL tTLH tTHL Table 9. Measurement points Type Input Output VM VM 74HC2G00 0.5 × V CC 0.5 × V CC 74HCT2G00 1.3 V 1.3 V |
Podobny numer części - 74HC2G00DP |
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Podobny opis - 74HC2G00DP |
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