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74HCT2G86GD Arkusz danych(PDF) 6 Page - NXP Semiconductors

Numer części 74HCT2G86GD
Szczegółowy opis  Dual 2-input exclusive-OR gate
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74HC_HCT2G86_3
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 03 — 7 May 2009
6 of 14
NXP Semiconductors
74HC2G86; 74HCT2G86
Dual 2-input exclusive-OR gate
11. Dynamic characteristics
[1]
tpd is the same as tPLH and tPHL.
[2]
tt is the same as tTLH and tTHL.
[3]
CPD is used to determine the dynamic power dissipation (PD in µW).
PD =CPD × VCC2 × fi × N+ Σ(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
Σ(C
L × VCC
2
× f
o) = sum of the outputs.
Table 8.
Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7.
Symbol Parameter
Conditions
25
°C
−40 °C to +85 °C −40 °C to +125 °C Unit
Min
Typ
Max
Min
Max
Min
Max
74HC2G86
tpd
propagation
delay
nA, nB to nY; see Figure 6
[1]
VCC = 2.0 V
-
34
120
-
150
-
180
ns
VCC = 4.5 V
-
11
20
-
25
-
36
ns
VCC = 6.0 V
-
9.0
17
-
21
-
30
ns
tt
transition
time
nY; see Figure 6
[2]
VCC = 2.0 V
-
18
75
-
95
-
110
ns
VCC = 4.5 V
-
6
15
-
19
-
22
ns
VCC = 6.0 V
5
13
-
16
-
20
ns
CPD
power
dissipation
capacitance
per buffer;
CL = 50 pF; fi = 1 MHz;
VI = GND to VCC
[3]
-10-
-
-
-
-
pF
74HCT2G86
tpd
propagation
delay
nA, nB to nY; see Figure 6
[1]
VCC = 4.5 V
-
11
19
-
23
-
48
ns
tt
transition
time
nY; see Figure 6
[2]
VCC = 4.5 V
-
6
15
-
19
-
22
ns
CPD
power
dissipation
capacitance
per buffer;
CL = 50 pF; fi = 1 MHz;
VI = GND to VCC
[3]
-9-
-
-
-
-
pF


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