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74HC3G06DP Arkusz danych(PDF) 3 Page - NXP Semiconductors |
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74HC3G06DP Arkusz danych(HTML) 3 Page - NXP Semiconductors |
3 / 13 page 74HC_HCT3G06_3 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 03 — 11 May 2009 3 of 13 NXP Semiconductors 74HC3G06; 74HCT3G06 Triple inverter with open-drain outputs 6.2 Pin description 7. Functional description [1] H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state. 8. Limiting values [1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] For TSSOP8 package: above 55 °C the value of P tot derates linearly with 2.5 mW/K. For VSSOP8 package: above 110 °C the value of P tot derates linearly with 8 mW/K. For XSON8U package: above 118 °C the value of P tot derates linearly with 7.8 mW/K. Table 3. Pin description Symbol Pin Description 1A, 2A, 3A 1, 3, 6 data input GND 4 ground (0 V) 1Y, 2Y, 3Y 7, 5, 2 data output VCC 8 supply voltage Table 4. Function table[1] Input nA Output nY LZ HL Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max Unit VCC supply voltage −0.5 7.0 V IIK input clamping current VI < −0.5 V or VI >VCC + 0.5 V [1] - ±20 mA IOK output clamping current VO < −0.5 V [1] −20 - mA VO output voltage active mode [1] −0.5 VCC + 0.5 V high-impedance mode [1] −0.5 7.0 V IO output current VO = −0.5 V to 7.0 V [1] -25 mA ICC supply current [1] -50 mA IGND ground current [1] −50 - mA Tstg storage temperature −65 +150 °C PD dynamic power dissipation Tamb = −40 °C to +125 °C [2] - 300 mW |
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Podobny opis - 74HC3G06DP |
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