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74HC3G14DP Arkusz danych(PDF) 11 Page - NXP Semiconductors |
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74HC3G14DP Arkusz danych(HTML) 11 Page - NXP Semiconductors |
11 / 18 page 74HC_HCT3G14_3 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 03 — 8 May 2009 11 of 18 NXP Semiconductors 74HC3G14; 74HCT3G14 Triple inverting Schmitt trigger 14. Application information The slow input rise and fall times cause additional power dissipation, which can be calculated using the following formula: Padd =fi × (tr ×∆ICC(AV) +tf ×∆ICC(AV)) × VCC where: Padd = additional power dissipation (µW); fi = input frequency (MHz); tr = input rise time (ns); 10 % to 90 %; tf = input fall time (ns); 90 % to 10 %; ∆I CC(AV) = average additional supply current (µA). ∆I CC(AV) differs with positive or negative input transitions, as shown in Figure 12 and Figure 13. An example of a relaxation circuit using the 74HC3G14/74HCT3G14 is shown in Figure 14. linear change of VI between 0.1VCC to 0.9VCC. Fig 12. ∆ICC(AV) as a function of VCC for 74HC3G14 mna036 0 2.0 4.0 6.0 VCC (V) 200 150 50 0 100 ∆ICC(AV) ( µA) positive-going edge negative-going edge |
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