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74LVCH2T45GM Arkusz danych(PDF) 3 Page - NXP Semiconductors |
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74LVCH2T45GM Arkusz danych(HTML) 3 Page - NXP Semiconductors |
3 / 32 page 74LVC_LVCH2T45_3 © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 03 — 19 January 2010 3 of 32 NXP Semiconductors 74LVC2T45; 74LVCH2T45 Dual supply translating transceiver; 3-state 5. Functional diagram 6. Pinning information 6.1 Pinning Fig 1. Logic symbol Fig 2. Logic diagram 001aag577 DIR 1B 2B 7 6 1A 2A 5 2 3 VCC(A) VCC(B) 001aag578 DIR 1B 2B 1A 2A VCC(A) VCC(B) Fig 3. Pin configuration SOT765-1 (VSSOP8) Fig 4. Pin configuration SOT833-1 (XSON8) 74LVC2T45 74LVCH2T45 VCC(A) VCC(B) 1A 1B 2A 2B GND DIR 001aai904 1 2 3 4 6 5 8 7 74LVC2T45 74LVCH2T45 2B 1B VCC(B) DIR 2A 1A VCC(A) GND 001aai905 36 27 18 45 Transparent top view |
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