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ADC1006S055H Arkusz danych(PDF) 4 Page - NXP Semiconductors |
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ADC1006S055H Arkusz danych(HTML) 4 Page - NXP Semiconductors |
4 / 31 page ADC1006S055_070_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 12 August 2008 4 of 31 NXP Semiconductors ADC1006S055/070 Single 10 bits ADC, up to 55 MHz or 70 MHz 7. Pinning information 7.1 Pinning 7.2 Pin description Fig 2. Pin configuration ADC1006S055/070 CMADC VCCO VCCA1 n.c. VCCA3 n.c. AGND3 D0 DEC D1 n.c. D2 n.c. D3 n.c. D4 n.c. D5 n.c. D6 VREF D7 014aaa442 1 2 3 4 5 6 7 8 9 10 11 33 32 31 30 29 28 27 26 25 24 23 Table 3. Pin description Symbol Pin Description CMADC 1 regulator output common mode ADC input VCCA1 2 analog supply voltage 1 (5 V) VCCA3 3 analog supply voltage 3 (5 V) AGND3 4 analog ground 3 DEC 5 decoupling node n.c. 6 not connected n.c. 7 not connected n.c. 8 not connected n.c. 9 not connected n.c. 10 not connected VREF 11 reference voltage input FSREF 12 full-scale reference output n.c. 13 not connected n.c. 14 not connected VCCD2 15 digital supply voltage 2 (5 V) n.c. 16 not connected DGND2 17 digital ground 2 |
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