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CS5466-ISZ Arkusz danych(PDF) 10 Page - Cirrus Logic |
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CS5466-ISZ Arkusz danych(HTML) 10 Page - Cirrus Logic |
10 / 16 page CS5466 10 DS659F1 4. THEORY OF OPERATION The CS5466 is a dual-channel analog-to-digital convert- er (ADC) followed by a computation engine that per- forms an energy-to-pulse conversion. The flow diagram for the two data paths is depicted in Figure 2. The ana- log inputs are structured with two dedicated channels, voltage and current, then optimized to simplify interfac- ing to sensing elements. The voltage-sensing element introduces a voltage waveform on the voltage channel input VIN ± and is sub- ject to a fixed 10x gain amplifier. A second-order delta- sigma modulator samples the amplified signal for digiti- zation. Simultaneously, the current sensing element introduces a voltage waveform on the current channel input IIN ± and is subject to four programmable gains. The ampli- fied signal is sampled by a fourth-order delta-sigma modulator for digitization. Both converters sample at a rate of MCLK / 8. The over-sampling provides a wide dynamic range and simplified anti-alias filter design. 4.1 Digital Filters The decimating digital filters on both channels are Sinc3 filters followed by fourth-order IIR filters. The single-bit data is passed to the low-pass decimation filter and out- put at a fixed word rate. The output word is passed to the IIR filter to compensate for the magnitude roll-off of the low-pass filtering operation. An optional digital high-pass filter (HPF in Figure 2) re- moves any DC component from the selected signal path. By removing the DC component from the voltage or current channel, any DC content will also be removed from the calculated average active (real) power as well. 4.2 Active Power Computation The instantaneous voltage and current data samples are multiplied to obtain the instantaneous power. The product is then averaged over 400 conversions to com- pute the active power value used to drive pulse outputs E1, E2, and FOUT. Output pulse rate of E1 and E2 can be set to one of four frequencies to directly drive a step- per motor or a electromechanical counter or interface to a microcontroller or infrared LED. The alternating output pulses of E1 and E2 allows for use with low-cost elec- tromechanical counters. Output FOUT provides a uniform pulse stream that is proportional to the active power and is designed for sys- tem calibration. The FREQ[2:0] inputs set the output pulse rate of E1, E2, and FOUT. See ”Energy Pulse Outputs” on page 11. for more details. 2nd Order ∆Σ Modulator 4th Order ∆Σ Modulator x VIN± IIN± Energy-to- Pulse Rate Converter E1 E2 FOUT Sinc3 PGA 10x HPF NEG IGAIN[1:0] FREQ[2:0] IIR IIR Sinc3 Current Channel Voltage Channel Digital Filter HPF N=400 Σ N HPF Config Digital Filter Figure 2. Data Flow |
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