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Zakładka z wyszukiwarką danych komponentów |
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Zakładka z wyszukiwarką danych komponentów |
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ADS1209SPWR Arkusz danych(PDF) 7 Page - Texas Instruments |
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ADS1209SPWR Arkusz danych(HTML) 7 Page - Texas Instruments |
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7 / 20 page  CLKIN OUTx CLKOUT t 2 t 1 t 3 t D3 t H1 t D1 t 4 t D2 ADS1209 www.ti.com SBAS491 – FEBRUARY 2010 PARAMETER MEASUREMENT INFORMATION Figure 1. ADS1209 Timing Diagram TIMING CHARACTERISTICS (1) Over the recommended operating ambient temperature range of –40°C to +105°C, AVDD = 5V, and BVDD = 2.7V to 5V, unless otherwise noted. PARAMETER TEST CONDITIONS MIN MAX UNIT t1 CLKIN period CLKSEL = 0 41.6 1000 ns t2 CLKIN high time CLKSEL = 0 10 t1 – 10 ns CLKSEL = 0 2 × t1 ns t3 CLKOUT period CLKSEL = 1 83 125 ns t4 CLKOUT high time (t3/2) – 5 (t3/2) + 5 ns tD1 CLKIN rising edge to CLKOUT falling edge delay CLKSEL = 0 10 ns tD2 CLKIN rising edge to CLKOUT rising edge delay CLKSEL = 0 10 ns CLKSEL = 0 t2 + 7 ns tD3 CLKOUT rising edge to new data valid delay CLKSEL = 1 (t3/4) + 8 ns CLKSEL = 0 t2 – 3 ns tH1 Data valid hold time referred to rising CLKOUT edge CLKSEL = 1 (t3/4) – 8 ns (1) All input signals are specified with tR = tF = 1.5ns (10% to 90% of BVDD) and timed from a voltage level of (VIL + VIH)/2. Copyright © 2010, Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Link(s): ADS1209 |
Podobny numer części - ADS1209SPWR |
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Podobny opis - ADS1209SPWR |
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