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AD80066KRSZRL Arkusz danych(PDF) 3 Page - Analog Devices |
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AD80066KRSZRL Arkusz danych(HTML) 3 Page - Analog Devices |
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3 / 20 page  AD80066 Rev. A | Page 3 of 20 SPECIFICATIONS ANALOG SPECIFICATIONS TMIN to TMAX, AVDD = 5 V, DRVDD = 5 V, CDS mode, fADCCLK = 24 MHz, fCDSCLK1 = fCDSCLK2 = 6 MHz, PGA gain = 1, unless otherwise noted. Table 1. Parameter Min Typ Max Unit MAXIMUM CONVERSION RATE 4-Channel Mode with CDS 24 MSPS 3-Channel Mode with CDS 24 MSPS 2-Channel Mode with CDS 24 MSPS 1-Channel Mode with CDS 12 MSPS ACCURACY (ENTIRE SIGNAL PATH) ADC Resolution 16 Bits Integral Nonlinearity (INL) +20/−5 LSB Differential Nonlinearity (DNL) ±0.5 LSB No Missing Codes Guaranteed ANALOG INPUTS Input Signal Range1 1.5/3.0 V p-p Allowable Reset Transient1 2.0 V Input Limits2 AVSS − 0.3 AVDD + 0.3 V Input Capacitance 10 pF Input Bias Current 10 nA AMPLIFIERS PGA Gain Range 1 5.9 V/V PGA Gain Resolution2 64 Steps PGA Gain Monotonicity Guaranteed Programmable Offset Range −305 +295 mV Programmable Offset Resolution 512 Steps Programmable Offset Monotonicity Guaranteed NOISE AND CROSSTALK Total Output Noise at PGA Minimum 9.5 LSB rms Total Output Noise at PGA Maximum 35 LSB rms Channel-to-Channel Crosstalk @ 24 MSPS 70 dB @ 12 MSPS 90 dB POWER SUPPLY REJECTION AVDD = 5 V ± 0.25 V 0.1 % FSR VOLTAGE REFERENCE (TA = 25°C) CAPT − CAPB 0.75 V TEMPERATURE RANGE Operating 0 70 °C Storage −65 +150 °C POWER SUPPLIES AVDD 4.5 5.0 5.25 V DRVDD 3.0 3.3 5.25 V OPERATING CURRENT AVDD 95 mA DRVDD 4 mA Power-Down Mode Current 300 μA |
Podobny numer części - AD80066KRSZRL |
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Podobny opis - AD80066KRSZRL |
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