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ADP172ACBZ-1.0-R7 Arkusz danych(PDF) 5 Page - Analog Devices

Numer części ADP172ACBZ-1.0-R7
Szczegółowy opis  300 mA, Low Quiescent Current CMOS Linear Regulator
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Strona internetowa  http://www.analog.com
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ADP172ACBZ-1.0-R7 Arkusz danych(HTML) 5 Page - Analog Devices

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ADP172
Rev. B | Page 5 of 20
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
Rating
VIN to GND
−0.3 V to +4.0 V
VOUT to GND
−0.3 V to VIN
EN to GND
−0.3 V to +4.0 V
Storage Temperature Range
−65°C to +150°C
Operating Junction Temperature Range
−40°C to +125°C
Operating Ambient Temperature Range
−40°C to +85°C
Soldering Conditions
JEDEC J-STD-020
Stresses above those listed under absolute maximum ratings
may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or
any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL DATA
Absolute maximum ratings apply only individually, not in
combination. The ADP172 can be damaged when the junction
temperature limits are exceeded. Monitoring ambient
temperature does not guarantee that TJ is within the specified
temperature limits. In applications with high power dissipation
and poor thermal resistance, the maximum ambient temperature
may have to be derated.
In applications with moderate power dissipation and low PCB
thermal resistance, the maximum ambient temperature can
exceed the maximum limit as long as the junction temperature
is within specification limits. The junction temperature (TJ) of
the device is dependent on the ambient temperature (TA), the
power dissipation of the device (PD), and the junction-to-
ambient thermal resistance of the package (θJA).
Maximum junction temperature (TJ) is calculated from the
ambient temperature (TA) and power dissipation (PD) using the
following formula:
TJ = TA + (PD × θJA)
Junction-to-ambient thermal resistance (θJA) of the package is
based on modeling and calculation using a 4-layer board. The
junction-to-ambient thermal resistance is highly dependent on
the application and board layout. In applications where high
maximum power dissipation exists, close attention to thermal
board design is required. The value of θJA may vary, depending
on PCB material, layout, and environmental conditions. The
specified values of θJA are based on a 4-layer, 4 in. × 3 in. PCB.
Refer to JESD51-7 for detailed information regarding board
construction.
ΨJB is the junction-to-board thermal characterization parameter
with units of °C/W. The ΨJB of the package is based on modeling
and calculation using a 4-layer board. The Guidelines for Reporting
and Using Electronic Package Thermal Information: JESD51-12
states that thermal characterization parameters are not the same
as thermal resistances. ΨJB measures the component power flowing
through multiple thermal paths rather than a single path as in
thermal resistance, θJB. Therefore, ΨJB thermal paths include
convection from the top of the package as well as radiation from
the package—factors that make ΨJB more useful in real-world
applications. Maximum junction temperature (TJ) is calculated
from the board temperature (TB) and power dissipation (PD)
using the formula
TJ = TB + (PD × ΨJB)
Refer to JESD51-8 and JESD51-12 for more detailed information
about ΨJB.
THERMAL RESISTANCE
θJA and ΨJB are specified for the worst-case conditions, that is, a
device soldered in a circuit board for surface-mount packages.
Table 4. Thermal Resistance
Package Type
θJA
ΨJB
Unit
4-Ball, 0.5 mm Pitch WLCSP
260
58
°C/W
ESD CAUTION


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