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MC13224V Arkusz danych(PDF) 8 Page - Freescale Semiconductor, Inc |
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MC13224V Arkusz danych(HTML) 8 Page - Freescale Semiconductor, Inc |
8 / 50 page MC13224V Technical Data, Rev. 1.2 8 Freescale Semiconductor regulated 20mA voltage source are provided to control external components and supply power to the PA outputs. The RF Interface functionality can be summarized as follows: • Programmable output power — 0 dBm nominal output power, programmable from -30 to +4 dBm • Receive sensitivity (at 1% PER, 20-byte packet) - — < -96 dBm (typical) DCD receive (well above IEEE 802.15.4 specification of -85 dBm) — < -100 dBm (typical) NCD receive (higher current) • Single-ended 50- Ω antenna port — Uses integrated transmit/receive (T/R) switch, LNA, and onboard balun. Impedance matching onboard. • Maximum flexibility — The optional single-ended port becomes RF input only and a separate set of full differential PA outputs are provided. Separate input and outputs allow for a variety of RF configurations including external LNA and PA for increased range • Four control signals for external RF components such as a LNA or PA • Regulated voltage source for PA biasing and powering external components 2.4.2 Modem The modem supports the full requirement of the IEEE 802.15.4 Standard to transmit and receive data packets. In additional, the mechanism is present to measure received signal level to provide CCA, ED, and LQI as required by the 802.15.4 Standard. 2.5 High Performance, Low Power 32-Bit ARM7 Processor • The ARM7TDMI-S processor is a member of the 32-bit ARM family of general-purpose 32-bit microprocessors that offers high performance with very low-power consumption • A three stage instruction pipeline (fetch, decode, execute) increases the speed of the flow of instructions to the processor • Data access can be 8-bit bytes, 16-bit half words, or 32-bit words. Words must be aligned to 4-byte boundaries. Half words must be aligned to 2-byte boundaries • The ARM7TDMI-S processor supports two instruction sets, the 32-bit ARM instruction set and the 16-bit Thumb instruction set. The Thumb mode incorporates 16-bit instructions for higher code density while retaining all the benefits of a 32-bit architecture, such as the full 32-bit registers, 32-bit operations, and 32-bit memory transfer. The use of the instruction sets can be intermixed for maximizing performance while retaining higher code density |
Podobny numer części - MC13224V |
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Podobny opis - MC13224V |
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