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74HCT157DTR2G Arkusz danych(PDF) 1 Page - ON Semiconductor |
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74HCT157DTR2G Arkusz danych(HTML) 1 Page - ON Semiconductor |
1 / 9 page © Semiconductor Components Industries, LLC, 2007 March, 2007 − Rev. 1 1 Publication Order Number: 74HCT157/D 74HCT157 Quad 2−Input Data Selectors / Multiplexers High−Performance Silicon−Gate CMOS The 74HCT157 is identical in pinout to the LS157. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. This device routes 2 nibbles (A or B) to a single port (Y) as determined by the Select input. The data is presented at the outputs in noninverted form. A high level on the Output Enable input sets all four Y outputs to a low level. Features • Output Drive Capability: 10 LSTTL Loads • TTL/NMOS−Compatible Input Levels • Outputs Directly Interface to CMOS, NMOS, and TTL • Operating Voltage Range: 4.5 to 5.5 V • Low Input Current: 1.0 mA • High Noise Immunity Characteristic of CMOS Devices • In Compliance with the Requirements Defined by JEDEC Standard No. 7A • ESD Performance: HBM > 2000 V; Machine Model > 200 V • Chip Complexity: 82 FETs or 20.5 Equivalent Gates • These are Pb−Free Devices http://onsemi.com MARKING DIAGRAMS SOIC−16 D SUFFIX CASE 751B TSSOP−16 DT SUFFIX CASE 948F 1 16 1 16 1 16 HCT157G AWLYWW HCT 157 ALYWG G 1 16 74HCT157 = Device Code A = Assembly Location L, WL = Wafer Lot Y = Year W, WW = Work Week G or G = Pb−Free Package See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. ORDERING INFORMATION (Note: Microdot may be in either location) |
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