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ADP3207CFJCPZ-RL Arkusz danych(PDF) 4 Page - ON Semiconductor |
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ADP3207CFJCPZ-RL Arkusz danych(HTML) 4 Page - ON Semiconductor |
4 / 32 page ADP3207C http://onsemi.com 4 PIN FUNCTION DESCRIPTIONS Pin No Mnemonic Description 1 EN Power Supply Enable Input. Pulling this pin to GND disables the PWM outputs and pulls the PWRGD output low. 2 PWRGD Power−Good Output. Open−drain output that signals when the output voltage is outside of the proper operating range. The pull−high voltage on this pin cannot be higher than VCC. 3 IMON Current Monitor Output. This pin sources a current proportional to the output load current. A resistor to FBRTN sets the current monitor gain. 4 CLKEN Clock Enable Output. The pull−high voltage on this pin cannot be higher than VCC. 5 FBRTN Feedback Return. VID DAC and error amplifier reference for remote sensing of the output voltage. 6 FB Feedback Input. Error amplifier input for remote sensing of the output voltage. 7 COMP Error Amplifier Output and Compensation Point. 8 NC Not Connected. 9 RPM RPM Mode Timing Control Input. A resistor between this pin to ground sets the RPM mode turn−on threshold voltage. 10 DPRSLP Deeper Sleep Control Input. 11 IREF This pin sets the internal bias currents. A 80kW resistor is connected from this pin to ground. 12 ILIMP Current Limit Set. An external resistor from ILIMN to ILIMP sets the current limit threshold of the converter. 13 ILIMN Current Limit Set. An external resistor from ILIMN to ILIMP sets the current limit threshold of the converter. 14 RT Multi−phase Frequency Setting Input. An external resistor connected between this pin and GND sets the oscillator frequency of the device when operating in multi−phase PWM mode. 15 RAMPADJ PWM Ramp Current Input. An external resistor from the converter input voltage to this pin sets the internal PWM ramp. 16 LLSET Output Load Line Programming Input. The center point of a resistor divider between CSREF and CSCOMP is connected to this pin to set the load line slope. 17 CSREF Current Sense Reference Voltage Input. The voltage on this pin is used as the reference for the current sense amplifier and the power−good and crowbar functions. This pin should be connected to the common point of the output inductors. 18 CSSUM Current Sense Summing Node. External resistors from each switch node to this pin sum the inductor currents together to measure the total output current. 19 CSCOMP Current Sense Compensation Point. A resistor and capacitor from this pin to CSSUM determine the gain of the current sense amplifier and the positioning loop response time. 20 GND Ground. All internal biasing and the logic output signals of the device are referenced to this ground. 21 to 23 SW3 to SW1 Current Balance Inputs. Inputs for measuring the current level in each phase. The SW pins of unused phases should be left open. 24 to 26 PWM3 to PWM1 Logic−Level PWM Outputs. Each output is connected to the input of an external MOSFET driver, such as the ADP3611. Connecting the PWM2 and/or PWM3 outputs to VCC causes that phase to turn off, allowing the ADP3207C to operate as a 1−, 2−, or 3−phase controller. 27 OD Multi−phase Output Disable Logic Output. This pin is actively pulled low when the ADP3207C enters single−phase mode or during shutdown. Connect this pin to the SD inputs of the Phase 2 and Phase 3 MOSFET drivers. 28 DCM Discontinuous Current Mode Enable Output. This pin is actively pulled low when the single−phase inductor current crosses zero. 29 VRTT Voltage Regulator Thermal Throttling Logic Output. This pin goes high if the temperature at the monitoring point connected to TTSENSE exceeds the programmed VRTT temperature threshold. 30 TTSENSE Thermal Throttling Sense Input and OVP Disable. The center point of a resistor divider (where the lower resistor is an NTC thermistor) between VCC and GND is connected to this pin to remotely sense the temperature at the desired thermal monitoring point. Connect TTSENSE VCC if Thermal Throttling is not used. 31 VCC Supply Voltage for the Device. 32 PSI Power State Indicator Input. Pulling this pin to GND forces the ADP3207C to operate in single−phase mode. 33 DRPSTP Deeper Stop Control Input. 34 to 40 VID6 to VID0 Voltage Identification DAC Inputs. When in normal operation mode, the DAC output programs the FB regulation voltage from 0.3 V to 1.5 V (see Table 3). |
Podobny numer części - ADP3207CFJCPZ-RL |
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Podobny opis - ADP3207CFJCPZ-RL |
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