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CAT24C208 Arkusz danych(PDF) 2 Page - ON Semiconductor

Numer części CAT24C208
Szczegółowy opis  8 kb Dual Port Serial EEPROM
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CAT24C208
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Table 1. PIN DESCRIPTION
Pin Number
Pin Name
Function
1
DSP VCC
Device power from display controller
2
DSP SCL
The CAT24C208 DSP serial clock bidirectional pin is used to clock all data transfers into or out of the
device DSP SDA pin and is also used to block DSP Port access when DDC Port is active.
3
DSP SDA
DSP Serial Data/Address. The bidirectional DSP serial data/address pin is used to transfer data into
and out of the device from a display controller. The DSP SDA pin is an open drain output and can be
wireOR’ed with other open drain or open collector outputs.
4
VSS
Device ground.
5
DDC SDA
DDC Serial Data/Address. The bidirectional DDC serial data/address pin is used to transfer data into
and out of the device from a DDC host. The DDC SDA pin is an open drain output and can be wire−
OR’ed with other open drain or open collector outputs.
6
DDC SCL
The CAT24C208 DDC serial clock bidirectional pin is used to clock all data transfers into or out of the
device DDC SDA pin, and is used to block DDC Port for access when DSP Port is active.
7
EDID SEL
EDID select. The CAT24C208 EDID select input selects the active bank of memory to be accessed
via the DDC SDA/SCL interface as set in the configuration register.
8
DDC VCC
Device power when powered from a DDC host.
Table 2. ABSOLUTE MAXIMUM RATINGS
Parameters
Ratings
Units
Temperature Under Bias
–55 to +125
°C
Storage Temperature
–65 to +150
°C
Voltage on Any Pin with Respect to Ground (Note 1)
–2.0 to +VCC +2.0
V
VCC with Respect to Ground
–2.0 to +7.0
V
Package Power Dissipation Capability (TA = 25°C)
1.0
W
Lead Soldering Temperature (10 secs)
300
°C
Output Short Circuit Current (Note 2)
100
mA
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. The minimum DC input voltage is –0.5 V. During transitions, inputs may undershoot to –2.0 V for periods of less than 20 ns. Maximum DC
voltage on output pins is VCC + 0.5 V, which may overshoot to VCC + 2.0 V for periods of less than 20 ns.
2. Output shorted for no more than one second. No more than one output shorted at a time.
Table 3. RELIABILITY CHARACTERISTICS
Symbol
Parameter
Reference Test Method
Min
Units
NEND (Note 3)
Endurance
MIL−STD−883, Test Method 1033
1,000,000
Cycles/Byte
TDR (Note 3)
Data Retention
MIL−STD−883, Test Method 1008
100
Years
VZAP (Note 3)
ESD Susceptibility
JEDEC Standard JESD 22
2000
Volts
ILTH (Notes 3 and 4)
Latch−up
JEDEC Standard 17
100
mA
3. This parameter is tested initially and after a design or process change that affects the parameter.
4. Latch−up protection is provided for stresses up to 100 mA on address and data pins from –1 V to VCC +1 V.
Table 4. CAPACITANCE (TA = 25°C, f = 1.0 MHz, VCC = 5 V)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
CI/O (Note 5)
Input/Output Capacitance (Either DSP or DDC SDA)
VI/O = 0 V
8
pF
CIN (Note 5)
Input Capacitance (EDID, Either DSP or DDC SCL)
VIN = 0 V
6
pF
5. This parameter is tested initially and after a design or process change that affects the parameter.


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