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MC14032BCP Arkusz danych(PDF) 1 Page - Motorola, Inc

Numer części MC14032BCP
Szczegółowy opis  Triple Serial Adders
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Producent  MOTOROLA [Motorola, Inc]
Strona internetowa  http://www.freescale.com
Logo MOTOROLA - Motorola, Inc

MC14032BCP Arkusz danych(HTML) 1 Page - Motorola, Inc

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MOTOROLA CMOS LOGIC DATA
MC14032B MC14038B
128
Triple Serial Adders
The MC14032B and MC14038B triple serial adders have the clock and
carry reset inputs common to all three adders. The carry is added on the
positive–going clock transition for the MC14032B, and on the negative–
going clock transition for the MC14038B. Typical applications include serial
arithmetic units, digital correlators, digital servo control systems, datalink
computers, and flight control computers.
• Buffered Outputs
• Single–Phase Clocking
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Capable of Driving Two Low–power TTL Loads or One Low–power
Schottky TTL Load Over the Rated Temperature Range.
• Pin–for–Pin Replacement for CD4032B and CD4038B.
MAXIMUM RATINGS* (Voltages Referenced to VSS)
Symbol
Parameter
Value
Unit
VDD
DC Supply Voltage
– 0.5 to + 18.0
V
Vin, Vout Input or Output Voltage (DC or Transient)
– 0.5 to VDD + 0.5
V
lin, lout
Input or Output Current (DC or Transient),
per Pin
± 10
mA
PD
Power Dissipation, per Package†
500
mW
Tstg
Storage Temperature
– 65 to + 150
_C
TL
Lead Temperature (8–Second Soldering)
260
_C
* Maximum Ratings are those values beyond which damage to the device may occur.
†Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/
_C From 65_C To 125_C
Ceramic “L” Packages: – 12 mW/
_C From 100_C To 125_C
This device contains protection circuitry to guard against damage
due to high static voltages or electric fields. However, precautions must
be taken to avoid applications of any voltage higher than maximum rated
voltages to this high-impedance circuit. For proper operation, Vin and
Vout should be constrained to the range VSS ≤ (Vin or Vout) ≤ VDD.
Unused inputs must always be tied to an appropriate logic voltage
level (e.g., either VSS or VDD). Unused outputs must be left open.
LOGIC DIAGRAMS
(ONE SECTION AND COMMON INPUTS SHOWN)
B
A
INVERT
CARRY
RESET
CLOCK
TO
NEXT
STAGE
TO
NEXT
STAGE
B
A
INVERT
CARRY
RESET
CLOCK
D
R
Q
C
D Q
C
S
S
D
R
Q
C
D Q
C
MC14032B
MC14038B
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
© Motorola, Inc. 1995
REV 3
1/94
MC14032B
MC14038B
L SUFFIX
CERAMIC
CASE 620
ORDERING INFORMATION
MC14XXXBCP
Plastic
MC14XXXBCL
Ceramic
MC14XXXBD
SOIC
TA = – 55° to 125°C for all packages.
P SUFFIX
PLASTIC
CASE 648
D SUFFIX
SOIC
CASE 751B
BLOCK DIAGRAM
CARRY RESET 6
CLOCK 3
INVERT 3 2
B3 14
A3 15
ADDER 3
1 S3
VDD = PIN 16
VSS = PIN 8
INVERT 2 5
B2 12
A2 13
ADDER 2
4 S2
INVERT 1 7
B1 11
A1 10
ADDER 1
9 S1


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