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CDCLVP111RHBT Arkusz danych(PDF) 1 Page - Texas Instruments

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Numer części CDCLVP111RHBT
Szczegółowy opis  LOW-VOLTAGE 1:10 LVPECL WITH SELECTABLE INPUT CLOCK DRIVER
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CDCLVP111RHBT Arkusz danych(HTML) 1 Page - Texas Instruments

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PowerPAD
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CDCLVP111
www.ti.com
SCAS859D – JANUARY 2009 – REVISED MARCH 2010
LOW-VOLTAGE 1:10 LVPECL
WITH SELECTABLE INPUT CLOCK DRIVER
Check for Samples: CDCLVP111
1
FEATURES
APPLICATIONS
Designed for Driving 50
Ω Transmission Lines
2
Distributes One Differential Clock Input Pair
LVPECL to 10 Differential LVPECL
High Performance Clock Distribution
Fully Compatible With LVECL/LVPECL
LQFP AND QFN PACKAGE
Supports a Wide Supply Voltage Range From
(TOP VIEW)
2.375 V to 3.8 V
Selectable Clock Input Through CLK_SEL
Low-Output Skew (Typ 15 ps) for
Clock-Distribution Applications
Additive Jitter Less Than 1 ps
Propagation Delay Less Than 350 ps
Open Input Default State
LVDS, CML, SSTL input compatible
VBB Reference Voltage Output for
Single-Ended Clocking
Available in a 32-Pin LQFP and QFN Package
Frequency Range From DC to 3.5 GHz
Pin-to-Pin Compatible With MC100 Series
EP111, ES6111, LVEP111, PTN1111
DESCRIPTION
The CDCLVP111 clock driver distributes one differential clock pair of LVPECL input, (CLK0, CLK1) to ten pairs of
differential LVPECL clock (Q0, Q9) outputs with minimum skew for clock distribution. The CDCLVP111 can
accept two clock sources into an input multiplexer. The CDCLVP111 is specifically designed for driving 50-
transmission lines. When an output pin is not used, leaving it open is recommended to reduce power
consumption. If only one of the output pins from a differential pair is used, the other output pin must be identically
terminated to 50
Ω.
The VBB reference voltage output is used if single-ended input operation is required. In this case, the VBB pin
should be connected to CLK0 and bypassed to GND via a 10-nF capacitor.
However, for high-speed performance up to 3.5 GHz, the differential mode is strongly recommended.
The CDCLVP111 is characterized for operation from –40°C to 85°C.
Table 1. FUNCTION TABLE
CLK_SEL
ACTIVE CLOCK INPUT
0
CLK0, CLK0
1
CLK1, CLK1
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
PowerPAD is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 2009–2010, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.


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