Zakładka z wyszukiwarką danych komponentów |
|
74LVT16501ADL Arkusz danych(PDF) 9 Page - NXP Semiconductors |
|
74LVT16501ADL Arkusz danych(HTML) 9 Page - NXP Semiconductors |
9 / 19 page 74LVT16501A_4 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 04 — 19 May 2006 9 of 19 Philips Semiconductors 74LVT16501A 3.3 V LVT 18-bit universal bus transceiver; 3-state [1] Typical values are at VCC = 3.3 V and Tamb =25 °C. [2] For valid test results, data must not be loaded into the flip-flops (or latches) after applying power. [3] Unused pins at VCC or GND. [4] This is the bus hold overdrive current required to force the input to the opposite logic state. [5] This parameter is valid for any VCC between 0 V and 1.2 V with a transition time of up to 10 ms. From VCC = 1.2 V to VCC = 3.3 V ± 0.3 V a transition time of 100 µs is permitted. This parameter is valid for Tamb =25 °C only. [6] ICC is measured with outputs pulled to VCC or GND. [7] This is the increase in supply current for each input at the specified voltage level other than VCC or GND. 11. Dynamic characteristics ∆I CC additional quiescent supply current per input pin; VCC = 3.0 V to 3.6 V; one input at VCC − 0.6 V, other inputs at VCC or GND [7] - 0.1 0.2 mA Ci input capacitance (control pins) VI = 0 V or 3.0 V - 3 - pF Cio input/output capacitance (I/O pins) outputs disabled; VI/O = 0 V or 3.0 V - 9 - pF Table 7. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 11. Symbol Parameter Conditions Min Typ Max Unit VCC = 2.7 V; Tamb = −40 °C to +85 °C tPLH propagation delay An to Bn or Bn to An see Figure 5 - - 5.4 ns CPAB to Bn or CPBA to An see Figure 6 - - 6.4 ns LEAB to Bn or LEBA to An see Figure 7 - - 6.4 ns tPHL propagation delay - - An to Bn or Bn to An see Figure 5 - - 5.4 ns CPAB to Bn or CPBA to An see Figure 6 - - 6.4 ns LEAB to Bn or LEBA to An see Figure 7 - - 6.4 ns tPZH output enable time to HIGH-state see Figure 8 - - 5.5 ns tPZL output enable time to LOW-state see Figure 9 - - 5.2 ns tPHZ output disable time from HIGH-state see Figure 8 - - 6.3 ns tPLZ output disable time from LOW-state see Figure 9 - - 5.6 ns tsu(H) setup time HIGH see Figure 10 An to CPAB or Bn to CPBA 2.4 - - ns An to LEAB with CPAB LOW or Bn to LEBA with CPBA LOW 2.0 - - ns An to LEAB with CPAB HIGH or Bn to LEBA with CPBA HIGH 1.5 - - ns |
Podobny numer części - 74LVT16501ADL |
|
Podobny opis - 74LVT16501ADL |
|
|
Link URL |
Polityka prywatności |
ALLDATASHEET.PL |
Czy Alldatasheet okazała się pomocna? [ DONATE ] |
O Alldatasheet | Reklama | Kontakt | Polityka prywatności | Linki | Lista producentów All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |