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SI4012-A0-GT Arkusz danych(PDF) 4 Page - Silicon Laboratories |
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SI4012-A0-GT Arkusz danych(HTML) 4 Page - Silicon Laboratories |
4 / 16 page Si4012 4 Rev 0.1 1. Electrical Specifications Table 1. DC Characteristics1 Parameter Symbol Conditions Min Typ Max Units Supply Voltage Range VDD 1.8 — 3.6 V Power Saving Modes IShutdown Lowest current mode — 100 — nA IIdle Register values retained, lowest current consumption idle mode —700 — nA TUNE Mode Current ITune Register values retained, LCOSC on fastest response to TX mode —5 — mA TX Mode Current @ 10 dBm ITX_OOK OOK, Manchester encoded — 14.2 — mA ITX_FSK FSK — 19.8 — mA Notes: 1. All specification guaranteed by production test unless otherwise noted. Production test conditions and max limits are listed in the "Production Test Conditions" section on page 9. 2. Guaranteed by qualification. Qualification test conditions are listed in the "Production Test Conditions" section on page 9. Table 2. Absolute Maximum Ratings1,2 Parameter Symbol Value Unit Supply Voltage VDD –0.5 to 3.9 V Input Current3 IIN 10 mA Input Voltage4 VIN –0.3 to (VDD + 0.3) V Junction Temperature TOP –40 to 90 C Storage Temperature TSTG –55 to 125 C Notes: 1. Permanent device damage may occur if the absolute maximum ratings are exceeded. Functional operation should be restricted to the conditions as specified in the operational sections of this data sheet. Exposure beyond recommended operating conditions for extended periods may affect device reliability. 2. Handling and assembly of these devices should only be done at ESD-protected workstations. 3. All input pins besides VDD. 4. For GPIO pins configured as inputs. |
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