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TDA8034AT Arkusz danych(PDF) 5 Page - NXP Semiconductors |
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TDA8034AT Arkusz danych(HTML) 5 Page - NXP Semiconductors |
5 / 29 page TDA8034T_TDA8034AT All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 2.0. — 12 November 2010 5 of 29 NXP Semiconductors TDA8034T; TDA8034AT Smart card interface [5] Uses an internal 20 k Ω pull-up resistor connected to pin V DD(INTF). [6] Uses an internal 10 k Ω pull-up resistor connected to pin V DD(INTF). 8. Functional description Remark: Throughout this document the ISO 7816 terminology conventions have been adhered to and it is assumed that the reader is familiar with these. 8.1 Power supplies The power supply voltage ranges are as follows: • VDDP: 4.85 V to 5.5 V • VDD: 2.7 V to 3.6 V All interface signals to the system controller are referenced to VDD(INTF). All card contacts remain inactive during power up or power down. After powering up the device, pin OFFN remains LOW until pin CMDVCCN is set HIGH and pin PRESN is LOW. During power down, pin OFFN goes LOW when VDDP falls below the falling threshold voltage (Vth). The internal oscillator frequency (fosc(int)) is only used during the activation sequences. When the card is not activated (pin CMDVCCN is HIGH), the internal oscillator is in low frequency mode to reduce power consumption. This device has a Low Drop-Off (LDO) voltage regulator connected to pin VCC, and is used instead of a DC-to-DC converter. It ensures a minimum VCC of 4.75 V and that the power supply voltage on pin VDDP does not fall below 4.85 V for a maximum load current of 65 mA. 8.2 Voltage supervisor Fig 3. Voltage supervisor circuit 001aak991 REFERENCE VOLTAGE VDD VDD VDD(INTF) 5 V or 3 V VDDP |
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