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AD8352ACPZ-WP Arkusz danych(PDF) 7 Page - Analog Devices

Numer części AD8352ACPZ-WP
Szczegółowy opis  2 GHz Ultralow Distortion Differential RF/IF Amplifier
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Strona internetowa  http://www.analog.com
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AD8352ACPZ-WP Arkusz danych(HTML) 7 Page - Analog Devices

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AD8352
Rev. B | Page 7 of 20
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
PIN 1
INDICATOR
1
RDP
2
RGP
3
RGN
4
RDN
11 VOP
12 GND
10 VON
9GND
TOP VIEW
(Not to Scale)
AD8352
Figure 3. Pin Configuration
Table 4. Pin Function Descriptions
Pin No.
Mnemonic
Description
1
RDP
Positive Distortion Adjust.
2
RGP
Positive Gain Adjust.
3
RGN
Negative Gain Adjust.
4
RDN
Negative Distortion Adjust.
5
VIN
Balanced Differential Input. This pin is biased to VCM, typically ac-coupled.
6, 7, 9, 12
GND
Ground. Connect this pin to low impedance GND.
8, 13
VCC
Positive Supply.
10
VON
Balanced Differential Output. This pin is biased to VCM, typically ac-coupled.
11
VOP
Balanced Differential Output. This pin is biased to VCM, typically ac-coupled.
14
VCM
Common-Mode Voltage. A voltage applied to this pin sets the common-mode voltage of the input and output.
Typically decoupled to ground with a 0.1 μF capacitor. With no reference applied, input and output common
mode floats to midsupply (VCC/2).
15
ENB
Enable. Apply positive voltage (1.3 V < ENB < VCC) to activate device.
16
VIP
Balanced Differential Input. This pin is biased to VCM, typically ac-coupled.


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