IRF6633APbF

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7

DirectFET

™ Substrate and PCB Layout, MU Outline

(Medium Size Can, U-Designation).

Please see AN-1035 for DirectFET assembly details and stencil and substrate design recommendations

Fig 18.

Diode Reverse Recovery Test Circuit for N-Channel

P.W.

Period

di/dt

Diode Recovery

dv/dt

Ripple

≤ 5%

Body Diode

Forward Drop

Re-Applied

Voltage

Reverse

Recovery

Current

Body Diode Forward

Current

Driver Gate Drive

Inductor Curent

D =

P.W.

Period

*

Inductor Current

Circuit Layout Considerations

• Low Stray Inductance

• Ground Plane

• Low Leakage Inductance

Current Transformer

• Driver same type as D.U.T.

• D.U.T. - Device Under Test

+

-

+

+

+

-

-

-

ƒ

„

‚

D.U.T



G = GATE

D = DRAIN

S = SOURCE

D

D

D

D

G

S

S