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ISL23315UFUZ Arkusz danych(PDF) 1 Page - Intersil Corporation |
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ISL23315UFUZ Arkusz danych(HTML) 1 Page - Intersil Corporation |
1 / 19 page 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 |Copyright Intersil Americas Inc. 2010. All Rights Reserved Intersil (and design) and XDCP are trademarks owned by Intersil Corporation or one of its subsidiaries. All other trademarks mentioned are the property of their respective owners Single, Low Voltage Digitally Controlled Potentiometer (XDCP™) ISL23315 The ISL23315 is a volatile, low voltage, low noise, low power, I2C Bus™, 256 Taps, single digitally controlled potentiometer (DCP), which integrates DCP core, wiper switches and control logic on a monolithic CMOS integrated circuit. The digitally controlled potentiometer is implemented with a combination of resistor elements and CMOS switches. The position of the wipers are controlled by the user through the I2C bus interface. The potentiometer has an associated volatile Wiper Register (WR) that can be directly written to and read by the user. The contents of the WR controls the position of the wiper. When powered on, the ISL23315’s wiper will always commence at mid-scale (128 tap position). The low voltage, low power consumption, and small package of the ISL23315 make it an ideal choice for use in battery operated equipment. In addition, the ISL23315 has a VLOGIC pin allowing down to 1.2V bus operation, independent from the VCC value. This allows for low logic levels to be connected directly to the ISL23315 without passing through a voltage level shifter. The DCP can be used as a three-terminal potentiometer or as a two-terminal variable resistor in a wide variety of applications including control, parameter adjustments, and signal processing. Applications • Power supply margining • RF power amplifier bias compensation •LCD bias compensation • Laser diode bias compensation Features • 256 resistor taps •I2C serial interface - No additional level translator for low bus supply - Two address pins allow up to four devices per bus • Wiper resistance: 70 Ω typical @ VCC = 3.3V • Shutdown Mode - forces the DCP into an end-to-end open circuit and RW is shorted to RL internally • Power-on preset to mid-scale (128 tap position) • Standby current <2.5µA max • Shutdown current <2µA max •Power supply -VCC = 1.7V to 5.5V analog power supply -VLOGIC = 1.2V to 5.5V I2C bus/logic power supply • DCP terminal voltage from 0V to VCC •10k Ω, 50kΩ or 100kΩ total resistance • Extended industrial temperature range: -40°C to +125°C • 10 Ld MSOP or 10 Ld µTQFN packages • Pb-free (RoHS compliant) FIGURE 1. FORWARD AND BACKWARD RESISTANCE vs TAP POSITION, 10k DCP FIGURE 2. VREF ADJUSTMENT 0 2000 4000 6000 8000 10000 0 50 100 150 200 250 TAP POSITION (DECIMAL) VREF VREF_M ISL28114 ISL23315 + - December 15, 2010 FN7778.0 |
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