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ADC1415S080 Arkusz danych(PDF) 11 Page - NXP Semiconductors |
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ADC1415S080 Arkusz danych(HTML) 11 Page - NXP Semiconductors |
11 / 33 page ADC1415S065_080_105_125_2 © NXP B.V. 2009. All rights reserved. Objective data sheet Rev. 02 — 4 June 2009 11 of 33 NXP Semiconductors ADC1415S065/080/105/125 Single 14-bit ADC 65, 80, 105 or 125 Msps with input buffer 11. Application information 11.1 Device control The ADC1415S can be controlled via the Serial Peripheral Interface (SPI control mode) or directly via the I/O pins (PIN control mode). 11.1.1 SPI and PIN control modes The device enters PIN control mode at power-up, and remains in this mode as long as pin CS is held HIGH. In PIN control mode, the SPI pins SDIO, CS and SCLK are used as static control pins. SPI settings are ignored. SPI control mode is enabled by forcing pin CS LOW. It is not possible to toggle between PIN control and SPI control modes. Once SPI control mode has been enabled, the device will remain in this mode until it is powered down. The transition from PIN control mode to SPI control mode is illustrated in Figure 4. When the device enters SPI control mode, the output data standard (CMOS or LVD DDR) is not determined by the state of the relevant SPI control bit (LVDS/CMOS; see Table 21), but by the level on pin SDIO at the instant a transition is triggered by a falling edge on CS (SDIO = LOW = CMOS). 11.1.2 Operating mode selection The active ADC1415S operating mode (Power-up, Power-down or Sleep) can be selected via the SPI interface (see Table 17) or using pins PWD and OE in PIN control mode, as described in Table 10. 11.1.3 Selecting the output data standard The output data standard (CMOS or LVDS DDR) can be selected via the SPI interface (see Table 21) or using pin ODS in PIN control mode. LVDS DDR is selected when ODS is HIGH, otherwise CMOS is selected. Fig 4. Control mode selection. R/W SPI control mode PIN control mode Data Format offset binary Data Format 2's complement LVDS DDR SDIO/ODS SCLK/DFS W1 W0 A12 005aaa039 CMOS CS Table 10. Operating mode selection via pin PWD and OE Pin PWD Pin OE Operating mode Output high-Z 0 0 Power-up no 0 1 Power-up yes 1 0 Sleep yes 1 1 Power-down yes |
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