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Zakładka z wyszukiwarką danych komponentów |
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LC6529L Arkusz danych(PDF) 9 Page - Sanyo Semicon Device |
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LC6529L Arkusz danych(HTML) 9 Page - Sanyo Semicon Device |
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9 / 39 page  Specifications LC6529N Absolute Maximum Ratings at Ta = 25°C, VSS = 0 V Note: 1. When the oscillator circuit in Figure 3 and the guaranteed constant are used, this is guaranteed over the full amplitude. 2. Averaged over 100-ms interval. Allowable Operating Ranges at Ta = –40 to +85°C, VSS = 0 V, VDD = 3.0 to 6.0 V Note: * Maintain the power supply voltage at VDD until the HALT instruction has completed execution, placing the chip in the standby mode. Block chattering from entering PA3 during the HALT instruction execution cycle. No. 5117-9/39 LC6529N, LC6529F, LC6529L Parameter Symbol Conditions min typ max Unit Maximum supply voltage VDD max VDD –0.3 +7.0 V VI1 OSC1*1 –0.3 VDD + 0.3 Input voltage VI2 TEST, RES –0.3 VDD + 0.3 V VI3 Port E (PE) configuration –0.3 VDD + 0.3 Output voltage VO OSC2 Voltages up to that generated allowed. V I/O voltages VIO1 Open-drain (OD) configuration –0.3 +15 V VIO2 Pull-up (PU) resistor configuration –0.3 VDD + 0.3 Peak output current IOP PA, PC, PD –2 +20 mA IOA PA, PC, PD: Average for pin over 100-ms interval –2 +20 Average output current ΣI OA1 PA: Total current for pins PA0 to PA3*2 –6 +40 mA ΣI OA2 PC, PD: Total current for pins PC0 to PC3 and –14 +90 PD0 to PD3*2 Pd max1 Ta = –40 to +85°C (DIP24S) 360 Allowable power dissipation Pd max2 Ta = –40 to +85°C (SSOP24) 165 mW Pd max3 Ta = –40 to +85°C (MFP30S) 150 Operating temperature Topr –40 +85 °C Storage temperature Tstg –55 +125 Parameter Symbol Conditions min typ max Unit Supply voltage VDD VDD 3.0 6.0 V Standby voltage VST VDD: Preserves contents of RAM and registers*. 1.8 6.0 V VIH1 Open-drain (OD) configuration: With output N-channel 0.7 VDD 13.5 transistor off VIH2 Pull-up (PU) resistor configuration: With output 0.7 VDD VDD Input high level voltage N-channel transistor off V VIH3 PE: Using port E configuration 0.7 VDD VDD VIH4 RES: VDD = 1.8 to 6 V 0.8 VDD VDD VIH5 OSC1: Using external clock option 0.8 VDD VDD VIL1 PA, PC, PD: With output N-channel transistor off, VSS 0.3 VDD VDD = 4 to 6 V VIL2 PA, PC, PD: With output N-channel transistor off VSS 0.25 VDD VIL3 PE: Using port E configuration, VDD = 4 to 6 V VSS 0.3 VDD VIL4 PE: Using port E configuration VSS 0.25 VDD Input low level voltage VIL5 OSC1: Using external clock option, VDD = 4 to 6 V VSS 0.25 VDD V VIL6 OSC1: Using external clock option VSS 0.2 VDD VIL7 TEST: VDD = 4 to 6 V VSS 0.3 VDD VIL8 TEST VSS 0.25 VDD VIL9 RES: VDD = 4 to 6 V VSS 0.25 VDD VIL10 RES VSS 0.2 VDD Operating frequency fop Using the built-in 1/3 or 1/4 frequency dividers extends 200 (20) 1444 (2.77) kHz (µs) (cycle time) (Tcyc) the maximum to 4.33 MHz. Continued on next page. |
Podobny numer części - LC6529L |
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Podobny opis - LC6529L |
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