5. Inverter array circuit option

One of the following options can be selected for each of the following port sets: P40/P41, P42/P43, PC2/PC3,

PD0/PD1, and PD2/PD3. (PDs do not use option 1 because they are dedicated to inputs)

No. 5485-9/26

LC665304A, 665306A, 665308A, 665312A, 665316A

Option

Circuit

Conditions and notes

1. Normal port I/O circuit

2. Inverter I/O circuit

When the open-drain output type is selected

When the built-in pull-up resistor output type is

selected

The CMOS outputs (PC) and the pull-up MOS

outputs (P4) are distinguished by the drive

capacity of the p-channel transistor.

If this option is selected, The I/O circuit is

disabled by the DSB signal.

Also note that the open-drain port output type

option and the high level at reset option must be

selected.

DSB

Output data

Input data

DSB

Output data

Input data

DSB

DSB

Input

Output

Output data

high

Input data

Output data

high

Input data