No. 5753-5/5

LC8213K

• CPU interface

The LC8213K has an 8-bit data bus. Various aspects of the operating mode can be set by accessing the interface

registers. Since the LC8213K provides interface pins for a DMA controller, DMA transfers with memory on the CPU

bus are supported.

• Image memory interface

The image memory has a 16-MB address space. A data bus width of either 8 or 16 bits can be selected.

• DMA transfer function

This function performs DMA transfers between image memory and I/O devices using the on-chip DMA controller. The

number of lines of data transferred can be set to any value up to 64k lines.

• Data transfers

Data can be transferred between the CPU bus and the image memory bus without encoding or decoding.

• Pad bit processing

Applications can select whether or not to perform pad bit processing. Pad bit processing consists of adding bits set to 0 at

the end of each line of encoded data so that the data for that line is an even multiple of 8 bits.

• Parameter settings

The LC8213K supports the following parameters, which can be set to any value in the indicated range.

• Number of bits processed on a single line (in byte units): 1 to 8k bytes

• Source document width (in byte units):

1 to 8k bytes

• Number of lines processed:

1 to 64k lines

• Minimum number of bits transmitted per line:

0 to 64k bits

• K parameter for MR encoding:

0 to 64k

• Number of lines handled in DMA transfers:

1 to 64k lines

• Number of EOL codes that form the RTC code:

0 to 255

Since the source document width and the number of bits processed on a single line can be set separately, the LC8213K

supports encoding or decoding the data for a subsection of the source document.

This catalog provides information as of September, 1997. Specifications and information herein are subject to

change without notice.

s No products described or contained herein are intended for use in surgical implants, life-support systems, aerospace

equipment, nuclear power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of

which may directly or indirectly cause injury, death or property loss.

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distributors and all their officers and employees, jointly and severally, against any and all claims and litigation and all

damages, cost and expenses associated with such use:

 Not impose any responsibility for any fault or negligence which may be cited in any such claim or litigation on

SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors or any of their officers and employees

jointly or severally.

s Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for

volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied

regarding its use or any infringements of intellectual property rights or other rights of third parties.