LC875064B/56B/48B

No.6714-10/26

Port Output Configuration

Output configuration and pull-up resistor options are shown in the following table.

Input is possible even when port is set to output mode.

Terminal

Option

applies to:

Option

Output Format

Pull-up resistor

1

CMOS

Programmable (Note 1)

P00-P07

1 bit units

2

Nch-open drain

None

1

CMOS

Programmable

P10-P17

P20-P27

each bit

2

Nch-open drain

Programmable

1

CMOS

Programmable

PA2-PA5

PB0-PB7(*)

PC0-PC7

each bit

2

Nch-open drain

Programmable

P70

-

None

Nch-open drain

Programmable

P71-P73

-

None

CMOS

Programmable

P80-P82

-

None

Nch-open drain

None

PWM0,

PWM1

-

None

CMOS

None

XT1

-

None

Input only

None

XT2

-

None

Output for 32.768kHz crystal oscillation

None

Note 1 Programmable pull-up resisters of Port 0 can be attatched in nibble units (P00-03, P04-07).

(*) When in parallel interface mode, PB0-PB7 output format is CMOS, regardless of any selected option.

Note: Connect as follows to reduce noise on VDD and increase the back-up time.

VSS1, VSS2 and VSS3 must be connected together and grounded.

Example 1 : In hold mode, during backup, port output ‘H’ level is supplied from the back-up capacitor.

Example 2 : During backup in hold mode output is not held high and its value in unsettled.

Power

Supply

LSI

VDD1

VDD2

VDD3

VSS1

VSS2

VSS3

Back-up capacitor

LSI

VDD1

VDD2

VDD3

VSS1

VSS2

VSS3

Power

Supply

Back-up capacitor