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FIN324C Arkusz danych(PDF) 2 Page - Fairchild Semiconductor

Numer części FIN324C
Szczegółowy opis  FIN324C Reset and Standby
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Producent  FAIRCHILD [Fairchild Semiconductor]
Strona internetowa  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

FIN324C Arkusz danych(HTML) 2 Page - Fairchild Semiconductor

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AN-6047
APPLICATION NOTE
© 2006 Fairchild Semiconductor Corporation
www.fairchildsemi.com
Rev. 1.0.3 • 8/22/07
2
System Implementation
The combination of the reset and standby pins offer the system
designer versatility.
In a mobile phone with a clam shell form factor, the reset pins
can be pulled LOW every time the flip is closed. This allows a
full reset of the registers and parallel outputs when the flip is
opened. The standby pin can be pulled LOW to save power
between writes to the display. This allows the micro serializer /
deserializer (µSerDes) to be in a power-down state and keep
the last-known states of the registers and parallel outputs.
These two pins allow the µSerDes pair and the system to
operate efficiently, depending on the systems status. For
example, a typical phone call may consist of:
Opening the flip
Dialing a number
Making the call
Hanging up and closing the flip
During each one of these states, the µSerDes pair can be
enabled and disabled to save the maximum amount of power
(please see Figure 2).
Per Figure 2, the reset and standby (STBY) status during the
phone call would be:
Flip Closed, Reset = L, STBY = L
Open Flip, Reset = H, STBY = H
Dialing Number, Reset = H, STBY = H
Making Call, Reset = H, STBY = L
Closing Flip, Reset = L, STBY = L
Figure 2 – Power Consumed During a Call
When powering on the µSerDes pair, it is recommended that
the standby pin is delayed by 20µs to the reset pin
transitioning HIGH (see Figure 3). Although this delay is not
required for full functionality, it is recommended to ensure that
the deserializer’s reset pin is fully HIGH and the device is
ready to be enabled by the LOW pulse on the CTL lines. If the
deserializer’s power is still transitioning when the CTL lines
transition LOW, the deserializer does not enable.
Figure 3 – Power-up Sequencing


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