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FAN9611 Arkusz danych(PDF) 10 Page - Fairchild Semiconductor

Numer części FAN9611
Szczegółowy opis  Design Consideration for Interleaved Boundary Conduction Mode PFC
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Producent  FAIRCHILD [Fairchild Semiconductor]
Strona internetowa  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

FAN9611 Arkusz danych(HTML) 10 Page - Fairchild Semiconductor

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AN-6086
© 2009 Fairchild Semiconductor Corporation
www.fairchildsemi.com
Rev. 1.0.4 • 4/22/10
10
,
(1 cos(4
))
DAVG
OUT
LINE
I
If
t
π
=−
OUT
I
,
2
OUT
OUT RIPPLE
LINE
OUT
I
V
fC
π
=
OUT
V
D
I
,
D AVG
I
Figure 16. Output Voltage Ripple
(Design Example) With the ripple specification of
8Vp-p, the capacitor should be:
,
1
398
22
50 8
OUT
OUT
LINE
OUT RIPPLE
I
CF
fV
μ
ππ
>=
=
⋅⋅
Since minimum allowable output voltage during one
cycle line (20ms) drop-outs is 330V, the capacitor
should be:
3
22
2
2
,
2
2 400 20 10
313
400
330
OUT
HOLD
OUT
OUT
OUT MIN
Pt
CF
VV
μ
⋅⋅
×
>=
=
−−
Thus, two 220
μF capacitors in parallel are selected
for the output capacitor.
[STEP-9] Design Compensation Network
The boost PFC power stage can be modeled as shown in
Figure 17. Since FAN9611/12 employs line feed-forward,
the power stage transfer function becomes independent of
the line voltage. Then, the power stage can be modeled as a
voltage-controlled current source supplying RC network.
Figure 17. Small Signal Modeling of the Power Stage
By averaging the diode current during the half line cycle,
the low frequency behavior of the voltage controlled
current source of Figure 17 is obtained as:
,
(0.2)
4.1
COMP
D LF
OUT
MAX
V
II
K
=⋅
(27)
where
IOUT
is
total
nominal
output
current
corresponding to POUT, VCOMP is compensation pin
voltage, 0.2V is PWM offset voltage and 4.1 is error
amplifier control range (refer to Figure 13).
Then, the low-frequency, small-signal, control-to-output
transfer function is obtained as:
ˆ
1
ˆ
4.1
2
1
2
OUT
OUT
MAX
L
COMP
P
vI
K
R
s
v
f
π
=⋅
+
(28)
where
2
2
P
LOUT
f
RC
π
=
and
RL is the output load resistance in a given load condition.
Figure 18 shows the variation of the control-to-output
transfer function for different loads. As can be seen, the
characteristics at frequencies above the pole are unchanged
while the pole moves as load changes. Since the low
frequency gain increases as load decreases, the light load
condition is the worst condition for feedback loop
compensation. Assuming the load resistance is infinite, the
control-to-output transfer function at light load condition is
obtained from Equation 28 as:
@,
ˆ
1
|
ˆ
4.1
OUT
OUT
MAX
LIGHT LOAD
COMP
OUT
vI
K
vsC
≅⋅
(29)


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