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FCA20N60S Arkusz danych(PDF) 11 Page - Fairchild Semiconductor |
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FCA20N60S Arkusz danych(HTML) 11 Page - Fairchild Semiconductor |
11 / 15 page AN-6982 APPLICATION NOTE © 2010 Fairchild Semiconductor Corporation www.fairchildsemi.com Rev. 1.0.0 • 6/8/10 11 where: 11 2 1 , 22 1 2 MI II IZ IC IC IC IP IC IC G f fand CR C f RC ππ π == ⋅⋅ ⋅ = ⋅⋅ (31) where GMI is the gain of transconductance error amplifier. The procedure to design the feedback loop is as follows: (a) Determine the crossover frequency (fIC) around 1/10~1/6 of the switching frequency. Then calculate the gain of the transfer function of Equation (29) at crossover frequency as: @ 2 π = ⋅ = ⋅⋅ ) ) IC CS CS BOUT IEA RAMP IC BOOST ff vR V vV f L (32) (b) Calculate RIC that makes the closed-loop gain unity at crossover frequency: @ 1 = = ⋅ ) ) IC IC CS MI IEA f f R v G v (33) (c) Since the control-to-output transfer function of power stage has -20dB/dec slope and -90o phase at the crossover frequency is 0dB, as shown in Figure 19, it is necessary to place the zero of the compensation network (fIZ) around 1/3 of the crossover frequency so that more than 45 ° phase margin is obtained. Then the capacitor CIC1 is determined as: 1 1 2/ 3 IC IC C C Rf π = ⋅ (34) (d) Place compensator high-frequency pole (fCP) at least a decade higher than fIC to ensure that it does not interfere with the phase margin of the current loop at its crossover frequency. 2 1 2 IC IP IC C fR π = ⋅⋅ (35) Figure 19. Current Loop Compensation (Design Example) Setting the crossover frequency as 6kHz (around 1/10 of switching frequency): 1 @ 36 2 0.1 387 0.44 2.55 2 6 10 916 10 IC CS CS BOUT IEA RAMP IC BOOST ff vR V vV f L π π = − ⋅ = ⋅⋅ ⋅ == ⋅⋅ × ⋅ × ) ) 6 @ 11 26 88 10 0.44 IC IC CS MI IEA ff R k v G v − = = == Ω ×⋅ ⋅ ) ) 1 33 11 3.1 2/ 3 26 10 2 6 10 / 3 IC IC C CnF Rf π π == = ⋅ ×⋅ ⋅ × Setting the pole of the compensator at 60kHz, 2 33 11 0.10 2 2 6010 2610 IC IP IC CnF fR π π == = ⋅⋅ ⋅× ⋅ × The actual components are a little changed for the off- the-shelf components as: RIC=27kΩ, CIC1=3.3nF, and CIC2=100pF. [STEP-9] PFC Voltage Loop Design Since FAN6982 employs line feed-forward, the power- stage transfer function becomes independent of the line voltage. Then the low-frequency, small-signal, control-to- output transfer function is obtained as: ˆ 1 ˆ 5 BOUT BOUT MAX EA BOUT vI K vsC ⋅ ≅⋅ (36) where / MAX MAX OUT OUT K PP = and 5V is the control window of error amplifier (5.6V-0.6V=5V). Proportional and integration (PI) control with high- frequency pole is typically used for compensation. The compensation zero (fVZ) introduces phase boost, while the high-frequency compensation pole (fVP) attenuates the switching ripple, as shown in Figure 20. Figure 20. Voltage Loop Compensation |
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