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ADN4605-EVALZ Arkusz danych(PDF) 6 Page - Analog Devices |
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ADN4605-EVALZ Arkusz danych(HTML) 6 Page - Analog Devices |
6 / 56 page ADN4605 Rev. 0 | Page 6 of 56 PARALLEL MODE SPECIFICATIONS UPDATE 1 0 WE D7:D0 A7:A0 1 0 CS 1 0 0 1 t6 t8 t3 t5 t1 t2 t4 t7 Figure 4. Parallel Mode Write Cycle Table 4. Parallel Mode Write Cycle Timing Specifications Limit Parameter Symbol Min Typ Max Unit Chip Select Setup Time t1 0 ns Parallel Data Setup Time t2 0 ns WE Pulse Width t3 30 50 ns Parallel Data Hold Time t4 25 ns WE Pulse Separation t5 25 ns WE to UPDATE Delay t6 40 ns UPDATE Pulse Width t7 30 ns Chip Select Hold Time t8 0 ns Reset Pulse Width 20 ns 1 0 RE CS 1 0 D7:D0 DATA (ADDR 1) ADDR 1 1 0 ADDR 2 A7:A0 1 0 DATA (ADDR 2) t1 t2 t6 t5 t3 t4 Figure 5. Parallel Mode Read Cycle Table 5. Parallel Mode Read Cycle Timing Specifications Limit Parameter Symbol Min Typ Max Unit Chip Select Setup Time t1 0 ns Parallel RE Setup to Valid Time t2 10 ns Data Access Time t3 25 50 ns Address to RE Hold Time t4 25 ns Data to RE Hold Time t5 25 ns Chip Select Hold Time t6 5 ns |
Podobny numer części - ADN4605-EVALZ |
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Podobny opis - ADN4605-EVALZ |
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