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ISL28133FEZ-T7 Arkusz danych(PDF) 11 Page - Intersil Corporation |
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ISL28133FEZ-T7 Arkusz danych(HTML) 11 Page - Intersil Corporation |
11 / 20 page ISL28133 11 FN6560.5 July 22, 2011 Applications Information Functional Description The ISL28133 uses a proprietary chopper-stabilized architecture shown in the “Block Diagram” on page 2. The ISL28133 combines a 400kHz main amplifier with a very high open loop gain (174dB) chopper stabilized amplifier to achieve very low offset voltage and drift (2µV, 0.02µV/°C typical) while consuming only 18µA of supply current per channel. This multi-path amplifier architecture contains a time continuous main amplifier whose input DC offset is corrected by a parallel-connected, high gain chopper stabilized DC correction amplifier operating at 100kHz. From DC to ~5kHz, both amplifiers are active with DC offset correction and most of the low frequency gain is provided by the chopper amplifier. A 5kHz crossover filter cuts off the low frequency amplifier path leaving the main amplifier active out to the 400kHz gain-bandwidth product of the device. The key benefits of this architecture for precision applications are very high open loop gain, very low DC offset, and low 1/f noise. The noise is virtually flat across the frequency range from a few mHz out to 100kHz, except for the narrow noise peak at the amplifier crossover frequency (5kHz). Rail-to-rail Input and Output (RRIO) The RRIO CMOS amplifier uses parallel input PMOS and NMOS that enable the inputs to swing 100mV beyond either supply rail. The inverting and non-inverting inputs do not have back-to-back input clamp diodes and are capable of maintaining high input impedance at high differential input voltages. This is effective in eliminating output distortion caused by high slew-rate input signals. The output stage uses common source connected PMOS and NMOS devices to achieve rail-to-rail output drive capability with 17mA current limit and the capability to swing to within 20mV of either rail while driving a 10k Ω load. IN+ and IN- Protection All input terminals have internal ESD protection diodes to both positive and negative supply rails, limiting the input voltage to within one diode beyond the supply rails. For applications where either input is expected to exceed the rails by 0.5V, an external series resistor must be used to ensure the input currents never exceed 20mA (see Figure 35). Layout Guidelines for High Impedance Inputs To achieve the maximum performance of the high input impedance and low offset voltage of the ISL28133 amplifiers, care should be taken in the circuit board layout. The PC board surface must remain clean and free of moisture to avoid leakage currents between adjacent traces. Surface coating of the circuit board will reduce surface moisture and provide a humidity barrier, reducing parasitic resistance on the board. High Gain, Precision DC-Coupled Amplifier The circuit in Figure 36 implements a single-stage, 10kV/V DC-coupled amplifier with an input DC sensitivity of under 100nV that is only possible using a low VOS amplifier with high open loop gain. This circuit is practical down to 1.8V due to it's rail-to-rail input and output capability. Standard high gain DC amplifiers operating from low voltage supplies are not practical at these high gains using typical low offset precision op amps because the input offset voltage and temperature coefficient consume most of the available output voltage swing. For example, a typical precision amplifier in a gain of 10kV/V with a ±100µV VOS and a temperature coefficient of 0.5µV/°C would produce a DC error at the output of >1V with an additional 5mV°C of temperature dependent error. At 3V, this DC error consumes > 30% of the total supply voltage, making it impractical to measure sub-microvolt low frequency signals. The ±8µV max VOS and 0.075µV/°C of the ISL28133 produces a temperature stable maximum DC output error of only ±80mV with a maximum temperature drift of 0.75mV/°C. The additional benefit of a very low 1/f noise corner frequency and some feedback filtering enables DC voltages and voltage fluctuations well below 100nV to be easily detected with a simple single stage amplifier. FIGURE 35. INPUT CURRENT LIMITING - + RIN RL VIN VOUT FIGURE 36. HIGH GAIN, PRECISION DC-COUPLED AMPLIFIER - + 100 Ω RL VIN VOUT 1M Ω 1M Ω, 100 Ω -2.5V +2.5V ACL = 10kV/V CF 0.018µF |
Podobny numer części - ISL28133FEZ-T7 |
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Podobny opis - ISL28133FEZ-T7 |
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